[pixel structure and fabricating method thereof]
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[0033]FIGS. 2A-2E are a schematic cross-sectional process flow showing a method of fabricating a structure of a pixel according to a first preferred embodiment of the present invention. Referring to FIGS. 2A and 2B, an active element 220 and a scan line (not shown) are formed on the substrate 210. The active element 220 is, for example, a low temperature polysilicon thin film transistor. The step of forming the active element 220 comprises, for example, first forming a polysilicon layer 222 on the substrate 210. Before the polysilicon layer 222 is formed, the step further comprises, for example, forming a buffer layer (not shown) on the substrate 210 for preventing ion contamination in the polysilicon layer 222 from the substrate 210. The polysilicon layer 222 is formed from an amorphous silicon layer by, for example, a thermal annealing process. Then, a gate dielectric layer 224 is selectively formed on the substrate 210 for covering the polysilicon layer 222. A gate terminal 226 i...
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