High polarization ferroelectric capacitors for integrated circuits

Abstract

One aspect of the invention relates to a method of manufacturing an integrated circuit comprising forming an array of ferroelectric memory cells on a semiconductor substrate, heating the substrate to a temperature near a Curie temperature of the ferroelectric cores, and subjecting the substrate to a temperature program, whereby thermally induced stresses on the ferroelectric cores cause a switched polarization of the cores to increase by at least about 25% as the cores cool to about room temperature. Embodiments of the invention include metal filled vias of expanded cross-section above and below the ferroelectric cores, which increase the thermal stresses on the ferroelectic cores during cooling.

Description

FIELD OF THE INVENTION [0001] The present invention relates generally to the field of integrated circuit manufacturing, and more particularly relates to ferroelectric RAM. BACKGROUND OF THE INVENTION [0002] Ferroelectric memory, and other types of semiconductor memory, are used for storing data and / or program code in personal computer systems, embedded processor-based systems, and the like. Ferroelectric memories are commonly organized in single-transistor, single-capacitor (1T1C) or two-transistor, two-capacitor (2T2C) configurations, in which data is read from or written to the device using address signals and various other control signals. The individual memory cells typically comprise one or more ferroelectric (FE) capacitors adapted to store a binary data bit, as well as one or more access transistors, typically MOS devices, operable to selectively connect the FE capacitor to one of a pair of complimentary bitlines, with the second bitline being connected to a reference voltage...

AI Technical Summary

Benefits of technology

[0014] Typically, a ferroelectric material undergoes a crystal phase transition as it drops below the Curie temperature. Above the Curie temperature, the domains are generally symmetric and exhibit paraelectric properties (no ferroelectric behavior). Below the Curie temperature, the crystal becomes tetragonal and the domains become generally asymmetric, wherein the material exhibits spontaneous polarization that facilitates ferroelectric switching properties. Ordinarily, the domains are randomly oriented, meaning that only about ⅓ are functionally aligned with respect to a ferroelectric capacitor. As the substrate cools, thermal stresses are created due to the mismatched coefficients of thermal expansion in layers adjacent the ferroelectric core. According to the invention, the thermal stresses are large enough and the cooling occurs slowly enough that a signficant portion of the domains reorient to relieve thermal stresses. The resulting ferroelectric cores have a higher switched polarization than ferroelectric cores found in prior art integrated circuits. The higher switched polarization allows the memory cells to be made smaller and more densely packed.

[0015] Another aspect of the invention relates to an array of ferroelectric memory cells, each cell comprising a capacitor stack having a ferroelectric core, the ferroelectric cores having asymmetric domains with one axis of polarity, wherein from about 40 to about 90% of the domains are functionally oriented with respect to the capacitor stack. According to a further aspect of the invention, metal plugs filling vias in a dielectric layer over the ferroelectric cores have an area about equal to or greater than that of the ferroelectric cores. The metal in the vias adds to the thermal stresses that reorient the domains during cooling.

Problems solved by technology

A characteristic of the illustrated ferroelectric memory cell is that if the polarization of the ferroelectric is switched, the read operation is destructive and the sense amplifier must rewrite (onto that cell) the correct polarization value after the cell is read.

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