Register file apparatus and method incorporating read-after-write blocking using detection cells

a technology of detection cells and register files, applied in the direction of information storage, static storage, digital storage, etc., can solve the problem of wasting up to 30% of the clock cycle tim
US20060039203A1Inactive Publication Date: 2006-02-23IBM CORP

Patent Information

Authority / Receiving Office
US ¡ United States
Patent Type
Applications(United States)
Current Assignee / Owner
IBM CORP
Publication Date
2006-02-23
Estimated Expiration
Not applicable ¡ inactive patent

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Abstract

A register file apparatus and method incorporating read-after-write blocking using detection cells provides improved read access times in high performance register files. One or more detection cells identical to the register file cells and located in the register file array are used to control the read operation in the register file by configuring the detection cells to either alternate value at each write or change to a particular value after a write and then detecting when the write has completed by detecting the state change of an active detection cell. The state change detection can be used to delay the leading edge of a read strobe or may be used in the access control logic to delay generation of a next read strobe. The register file thus provides a scalable design that does not have to be tuned for each application and that tracks over voltage and clock skew variation.
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Description

CROSS-REFERENCE TO RELATED APPLICATION

[0001] The present application is related to co-pending U.S. Patent Application “DYNAMIC-STATIC LOGICAL CONTROL ELEMENT FOR SIGNALING AN INTERVAL BETWEEN THE END OF A CONTROL SIGNAL AND A LOGICAL EVALUATION”, Ser. No. 10 / ______, filed concurrently with this application by the same inventors and assigned to the same Assignee. The specification of the above-referenced application is incorporated herein by reference.BACKGROUND OF THE INVENTION

[0002] 1. Technical Field

[0003] The present invention relates generally to register file access control circuits, and more particularly to a register file having automatic read-after-write blocking.

[0004] 2. Description of the Related Art

[0005] Register files are commonly used building blocks in digital circuits, particularly in processing system components where fast access to a fairly small quantity of data is required with low access latency. Examples of register file uses include register arrays in pr...

Claims

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