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1-bit cell circuit used in a pipelined analog to digital converter

a technology of analog to digital converter and cell circuit, which is applied in the field of pipelined analog to digital converter, can solve the problem of longer sampling tim

Active Publication Date: 2010-12-23
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a signal independent voltage reference loading circuit for a pipelined analog to digital converter. This circuit helps to construct a concise and power saving pipelined ADC. It also helps to release the speed requirement of the voltage reference buffer. The circuit includes a differential amplifier, capacitors, and a reference buffer. The capacitors are connected to the differential input and output ends of the differential amplifier during the sampling phase and the charge transfer phase. The reference buffer selectively connects to the sample and charge transfer circuit or the dump circuit based on the input signal. The technical effects of this invention include improved signal-to-noise ratios, reduced power consumption, and improved performance of the pipelined analog to digital converter.

Problems solved by technology

However, this implies a longer sampling time.

Method used

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Embodiment Construction

[0028]The present invention will be described in more detail hereinafter with reference to the accompanying drawings that show the preferred embodiment of the invention.

[0029]Please refer to FIG. 3a˜b, which shows the circuit diagram of a 1-bit cell using a signal independent voltage reference loading circuit according to a preferred embodiment of the present invention. The 1-bit cell ADC procedure includes a first half period of sampling phase, a second half period of sampling phase and a charge transfer phase during a converting period. As shown in FIG. 3a, the 1-bit cell ADC serve as a sample and charge transfer circuit comprises an OTA (Operational Transconductance Amplifier ) 301, six matched capacitors 302˜307, eight sampling phase switches 308˜315, seven charge transfer phase switches 316˜322, two multiplexers 323 and 324, two comparators 337 and 338 and a voltage reference buffer 339. As shown in FIG. 3b, a dump circuit comprises two multiplexers 330 and 336, two matched cap...

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Abstract

The present invention discloses a 1-bit cell circuit used in a pipelined analog to digital converter. The 1-bit cell circuit comprises a reference buffer for providing a reference voltage; a sample and charge transfer circuit for receiving an input signal to generate an output signal; and a dump circuit for dumping said reference voltage; wherein said reference buffer selectively connects to one of said sample and charge transfer circuit and said dump circuit according to said input signal.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to pipelined ADCs, and more particularly to a 1-bit cell circuit used in pipelined ADCs.[0003]2. Description of the Related Art[0004]In mixed modes circuits, ADC (Analog-Digital-Converter) is an inevitable part. Recently, pipelined ADC is widely adopted due to its concise structure and superior performance. Please refer to FIG. 1, which shows the typical architecture of a prior art 1-bit cell of a pipelined ADC. The 1-bit cell has a sampling phase and a charge transfer phase during a clock cycle. As shown in FIG. 1, the 1-bit cell includes an OTA (Operational Transconductance Amplifier) 101, four matched capacitors 102˜105, a first set of switches 106˜113, a second set of switches 114˜121, two multiplexers 122 and 123, and two latched comparators 124 and 125.[0005]The OTA 101 is used to generate a residue output Vout according to an input signal Vin, wherein the residue output Vout is compo...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H03M1/12
CPCH03M1/442
Inventor GINETTI, BERNARD
Owner MEDIATEK INC