Method, system and program storage device for generating accurate performance targets for active semiconductor devices during new technology node development

a technology of active semiconductor devices and performance targets, which is applied in the direction of cad circuit design, program control, instruments, etc., can solve the problems of inferior model quality, inferior model input, and inability to accurately generate performance targets, so as to avoid inferior models and false conclusions regarding device performance, the likelihood of inaccurate performance targets being used as inputs at the modeling stage is reduced, and the accuracy of the performance target is increased

Inactive Publication Date: 2013-05-23
GLOBALFOUNDRIES INC
View PDF2 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0007]Disclosed herein are embodiments of a computer-implemented method as well as an associated system and program storage device for generating more accurate performance targets (i.e., target performance characteristics) for active semiconductor devices during the technology node development stage in order to reduce the number of iterations required for model extraction and / or to improve model quality. In these embodiments, initial sets of performance targets for related semiconductor devices can be generated using, for example, prior art techniques of making assumptions based on hardware measurements taken from semiconductor devices in prior technology nodes and / or from preliminary hardware with limited quality of the technology node under development and / or numerical simulations (Technology Computer Aided Design) for the same technology node. However, instead of simply relying on these initial sets for model extractions, additional processes can be performed prior to the modeling stage to detect and resolve any inconsistencies between the data in the sets. Specifically, various plotting techniques can be performed with respect to the performance targets and the results can be analyzed to detect any inconsistencies, which may indicate inaccurate performance targets and, particularly, which may indicate that the performance targets would violate the laws of device physics. Then adjustments can be made to the performance targets in order to resolve those inconsistencies.
[0013]As described above, the additional processes used to detect and resolve any inconsistencies between the data in the initial sets of performance targets can be performed in the alternative. However, it should be understood that these additional processes could also be performed in combination in order to further increase inconsistency detection sensitivity (i.e., increase the likelihood that any inconsistencies in the performance targets will be detected) and, thereby increase the accuracy of the performance targets, as adjusted.

Problems solved by technology

During the early stages of new technology node development, engineers do not have actual hardware from which to take performance measurements.
Unfortunately, such performance targets may turn out to be incorrect and lead, at the modeling stage of the new technology node development, to unnecessary and time consuming iterations for the model extraction process and / or inferior model quality.
These prototype hardware measurements may, however, be influenced by defects and strong process variations.
Consequently, the resulting plots may be affected by large statistical errors and, thereby may provide support for inaccurate performance targets (e.g., for performance targets which actually violate the principles of semiconductor device physics and / or scaling laws).
When such inaccurate performance targets are used as model inputs, they may lead to contradictions during the model build and will be rejected outright such that new performance targets have to be generated and verified, thereby leading to unnecessary and time consuming iterations for the model extraction process.
Furthermore, if the inaccurate performance targets are not rejected outright, their use as model inputs could lead to inferior model quality and, thereby false conclusions performance.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method, system and program storage device for generating accurate performance targets for active semiconductor devices during new technology node development
  • Method, system and program storage device for generating accurate performance targets for active semiconductor devices during new technology node development
  • Method, system and program storage device for generating accurate performance targets for active semiconductor devices during new technology node development

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031]The various embodiments described below are presented for purposes of illustration, but are not intended to be exhaustive or limiting. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

[0032]As mentioned above, during the early stages of new technology node development, engineers do not have actual hardware from which to take performance measurements. Thus, they will typically generate performance targets (i.e., target performance characteristics) for active semiconductor devices in the new technology node based on assumptions and on measurements taken from hardware in previous technology n...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

Disclosed are embodiments of a method, system and program storage device for generating accurate performance targets for active semiconductor devices during technology node development in order to reduce the number of iterations required for model extraction and / or to improve model quality. In these embodiments, initial sets of performance targets for related semiconductor devices are generated, e.g., by making assumptions based on hardware measurements taken from semiconductor devices in prior technology nodes. Additional processes are then performed on the initial sets of performance targets prior to the modeling stage in order to detect and resolve any inconsistencies between the data in the sets. Specifically, plotting techniques are performed with respect to the performance targets. The results are analyzed to detect any inconsistencies indicating that the performance targets are inaccurate and adjustments are made to the performance targets in order to resolve those inconsistencies.

Description

BACKGROUND[0001]1. Field of the Invention[0002]The embodiments herein relate to generating performance targets for active semiconductor devices and, more particularly, to a method, system and program storage device for generating more accurate performance targets for active semiconductor devices during new technology node development.[0003]2. Description of the Related Art[0004]During the early stages of new technology node development, engineers do not have actual hardware from which to take performance measurements. Thus, they will typically generate performance targets (i.e., target performance characteristics) for active semiconductor devices in the new technology node based on assumptions and on measurements taken from hardware in previous technology nodes. Unfortunately, such performance targets may turn out to be incorrect and lead, at the modeling stage of the new technology node development, to unnecessary and time consuming iterations for the model extraction process and / o...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(United States)
IPC IPC(8): G06F17/50
CPCG06F17/5045G06F30/30
Inventor JOHNSON, JAMES M.SPRINGER, SCOTT K.THOMA, RAINERWATTS, JOSEF S.
Owner GLOBALFOUNDRIES INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products