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Semiconductor device

Active Publication Date: 2015-07-09
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The goal of this patent is to improve the accuracy of positioning the lid of a semiconductor device while reducing the cost. The invention makes this possible.

Problems solved by technology

Applying cutting to reduce this curved surface results in a cost increase.
Moreover, since the curved surface cannot be reduced to 0, its positioning accuracy is low.

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

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Experimental program
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first embodiment

[0019]FIG. 1 is a perspective view illustrating a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view illustrating the semiconductor device according to the first embodiment of the present invention. A package 1 includes a base plate 2 and a side wall 3 provided on the perimeter of the base plate 2. The base plate 2 and the side wall 3 are rectangular in a plan view. A semiconductor element 4 is provided on the base plate 2. A lid 5 is joined to the top of the side wall 3 so as to cover the semiconductor element 4.

[0020]A curved surface (R) is provided inside the package 1 at the top of the side wall 3. A curved surface is provided on the perimeter of the undersurface of the lid 5. The perimeter of the lid 5 sits atop the side wall 3 and the curved surface of the side wall 3 is in contact with the curved surface of the lid 5. The radius of the curved surface of the side wall 3 is smaller than the radius of the curved surfac...

second embodiment

[0022]FIG. 3 is a cross-sectional view illustrating a semiconductor device according to a second embodiment of the present invention. The top of the side wall 3 has a rectangular shape. Step-like height differences are provided at the perimeter of the undersurface of the lid 5. At the top of the side wall 3, a corner inside the package 1 is in contact with a height difference of the lid 5. This prevents a backlash between the package 1 and the lid 5, and can thereby improve positioning accuracy.

[0023]However, a gap may be produced between the package 1 and the lid 5 in a condition in which the perimeter of the lid 5 sits atop the side wall 3, which may cause a welding fault. Thus, the lid 5 is made thinner and the lid 5 is made to deform under the load of the electrode during seam welding to eliminate any gap between the package 1 and the lid 5.

[0024]Furthermore, the lid 5 can be positioned by providing a height difference only on the lid 5 side and height differences need not be pr...

third embodiment

[0025]FIG. 4 is a cross-sectional view illustrating a semiconductor device according to a third embodiment of the present invention. FIG. 5 is a top view illustrating the semiconductor device according to the third embodiment of the present invention. A plurality of pins 7 are provided as stoppers on four sides at the top of the side wall 3. The lid 5 is positioned by the plurality of pins 7.

[0026]This prevents the lid 5 from sticking out of the package 1 without providing any positioning structure in the lid 5. Moreover, while providing height differences in the package 1 or the lid 5 produces curved surfaces, only providing the pins 7 produces no curved surface, and it is thereby possible to improve positioning accuracy of the lid while reducing the cost.

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PUM

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Abstract

A semiconductor device includes: a package including a base plate and a side wall located on a perimeter of the base plate; a semiconductor element on the base plate; and a lid joined to a top of the side wall and covering the semiconductor element, wherein a first curved surface is located inside the package at the top of the side wall, a second curved surface is located on a perimeter of an undersurface of the lid, and the first curved surface of the side wall contacts the second curved surface of the lid.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a semiconductor hermetically sealed package.[0003]2. Background Art[0004]In semiconductor hermetically sealed packages, a semiconductor element is mounted in a package and then a lid is seam-welded to secure air tightness. The package and the lid are positioned by pressing a protrusion provided on the lid against a package inner wall.[0005]The protrusion of the lid is provided with a curved surface through press molding and the inner diameter of the package is designed in such a way that the package inner diameter does not interfere with this curved surface. This causes a backlash between the package and the lid to increase, causing the lid to stick out of the package. To solve this problem, a technique is proposed which provides the package and the lid with height differences respectively to make the lid to fit into the package (e.g., see Japanese Patent Laid-Open No. 10-65036).SUMMARY ...

Claims

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Application Information

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IPC IPC(8): H01L23/10H01L23/04B65D55/10
CPCH01L23/10H01L23/04B65D55/10H01L2924/0002H01L2924/16195H01L2924/00
Inventor HATA, TADAYOSHIOGATA, KEIZO
Owner MITSUBISHI ELECTRIC CORP
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