Semiconductor package and method of fabricating the same
a semiconductor and package technology, applied in the direction of semiconductor/solid-state device details, semiconductor devices, electrical apparatus, etc., can solve the problems of difficult to reduce the horizontal and vertical sizes of semiconductor packages, voids may form between bumps, etc., and achieve the effect of small form factor and high speed
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[0065]FIG. 1A is a plan view illustrating a bottom surface of a package substrate according to some example embodiments of inventive concepts. FIG. 1B is a sectional view taken along a line A-A′ of FIG. 1A. FIG. 1C is a perspective view of the bottom surface of the package substrate according to some example embodiments of inventive concepts.
[0066]Referring to FIGS. 1A, 1B and 1C, a semiconductor package may include a package substrate 1. The package substrate 1 may be a printed circuit board of a singe-layered or multi-layered structure. The package substrate 1 may be formed of bismaleimide triazine resin, alumina-based ceramics, glass-based ceramics or silicon. The package substrate 1 may include a top surface 1a and a bottom surface 1b facing each other. The package substrate 1 may have at least one hole 7 that penetrates the package substrate 1 and connects the top surface 1a to the bottom surface 1b. An upper conductive pattern 3a may be provided on the top surface 1a of the pa...
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Abstract
Description
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