Semiconductor package and method of fabricating the same

a semiconductor and package technology, applied in the direction of semiconductor/solid-state device details, semiconductor devices, electrical apparatus, etc., can solve the problems of difficult to reduce the horizontal and vertical sizes of semiconductor packages, voids may form between bumps, etc., and achieve the effect of small form factor and high speed

Inactive Publication Date: 2016-04-21
KIM JONGKOOK +6
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This design enables high-speed, small-form-factor semiconductor packages with improved reliability by preventing electrical shorts and simplifying the fabrication process, while allowing for increased routability of solder balls and reduced package size.

Problems solved by technology

However, a void may be formed between bumps when a semiconductor package is fabricated using the flip-chip bonding technique.
However, if the under-fill resin layer is used, a dam is needed to prevent an unintentional flow of the under-fill resin solution, and thus, it is hard to reduce horizontal and vertical sizes of the semiconductor package.

Method used

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  • Semiconductor package and method of fabricating the same
  • Semiconductor package and method of fabricating the same
  • Semiconductor package and method of fabricating the same

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example embodiments

[0065]FIG. 1A is a plan view illustrating a bottom surface of a package substrate according to some example embodiments of inventive concepts. FIG. 1B is a sectional view taken along a line A-A′ of FIG. 1A. FIG. 1C is a perspective view of the bottom surface of the package substrate according to some example embodiments of inventive concepts.

[0066]Referring to FIGS. 1A, 1B and 1C, a semiconductor package may include a package substrate 1. The package substrate 1 may be a printed circuit board of a singe-layered or multi-layered structure. The package substrate 1 may be formed of bismaleimide triazine resin, alumina-based ceramics, glass-based ceramics or silicon. The package substrate 1 may include a top surface 1a and a bottom surface 1b facing each other. The package substrate 1 may have at least one hole 7 that penetrates the package substrate 1 and connects the top surface 1a to the bottom surface 1b. An upper conductive pattern 3a may be provided on the top surface 1a of the pa...

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Abstract

Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 13 / 922,722 filed on Jun. 20, 2013, which claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2012-0074722, filed on Jul. 9, 2012, in the Korean Intellectual Property Office, the entire contents of each of which are hereby incorporated by reference.BACKGROUND OF THE INVENTION[0002]Some example embodiments of inventive concepts include a semiconductor package and / or a method of fabricating the same.[0003]High performance, high speed and small sized electronic systems are in greater demand as the electronic industry continues to develop. In response to this demand, various semiconductor package techniques have been proposed. For example, a flip-chip bonding technique has been proposed capable of reducing a routing length between pads and consequently having an improved signal transmission speed, compared with that of a wire-bonding technique. Further,...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L23/31H01L23/538
CPCH01L23/5386H01L23/3107H01L23/3128H01L21/561H01L21/565H01L24/97H01L2224/48091H01L2224/73265H01L2224/16225H01L2224/32145H01L2224/32225H01L2924/15311H01L2924/18301H01L2224/97H01L23/13H01L23/49811H01L25/0657H01L25/105H01L2225/0651H01L2225/06517H01L2225/1023H01L2225/1058H01L2225/1076H01L2225/06558H01L2924/15151H01L2924/181H01L2924/12042H01L2224/73253H01L23/49816H01L2224/48137H01L2924/00014H01L2224/85H01L2224/81H01L2924/00H01L2924/00012H01L23/31H01L21/56
InventorKIM, JONGKOOKPARKPARK, SOOJEOUNGBAEK, BONAIM, HOHYEUKJANG, BYOUNGWOOKJUNG, YOONHA
OwnerKIM JONGKOOK