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Programmable graphics processor for multithreaded execution of programs

a programmable graphics processor and program technology, applied in the field of multi-threaded processing, can solve the problems of underutilized vertex processing unit and underutilized pixel processing uni

Active Publication Date: 2016-10-13
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a way to handle graphics data processing by using the same pipeline for processing different types of data, such as vertex and pixel data. The processing unit includes multiple execution pipelines that can process a large number of pixels or vertices in parallel. This results in higher processing efficiency and faster processing speed.

Problems solved by technology

When the amount of vertex data being processed is low relative the amount of pixel data being processed, the vertex processing unit may be underutilized.
Conversely, when the amount of vertex data being processed is high relative the amount of pixel data being processed, the pixel processing unit may be underutilized.

Method used

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  • Programmable graphics processor for multithreaded execution of programs
  • Programmable graphics processor for multithreaded execution of programs
  • Programmable graphics processor for multithreaded execution of programs

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Embodiment Construction

[0024]In the following description, numerous specific details are set forth to provide a more thorough understanding of the present invention. However, it will be apparent to one of skill in the art that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present invention.

[0025]FIG. 1 is an illustration of a computing system generally designated 100 and including a host computer 110 and a graphics subsystem 170. Computing system 100 may be a desktop computer, server, laptop computer, palm-sized computer, tablet computer, game console, cellular telephone, computer based simulator, or the like. Host computer 110 includes host processor 114 that may include a system memory controller to interface directly to host memory 112 or may communicate with host memory 112 through a system interface 115. System interface 115 may be an I / O (input / output) interface or ...

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Abstract

A processing unit includes multiple execution pipelines, each of which is coupled to a first input section for receiving input data for pixel processing and a second input section for receiving input data for vertex processing and to a first output section for storing processed pixel data and a second output section for storing processed vertex data. The processed vertex data is rasterized and scan converted into pixel data that is used as the input data for pixel processing. The processed pixel data is output to a raster analyzer.

Description

RELATED APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 13 / 466,043, filed May 7, 2012, which is a continuation of U.S. patent application Ser. No. 12 / 649,201, filed Dec. 29, 2009 (Attorney Docket No. NVDA / P001985-US1-DIV1), which is a divisional application of U.S. patent application Ser. No. 11 / 458,633, filed Jul. 19, 2006 (Attorney Docket No. NVDA / P001985-US1), which is a continuation-in-part of U.S. patent application Ser. No. 10 / 696,714, filed Oct. 29, 2003, issued as U.S. Pat. No. 7,103,720 (Attorney Docket No. NVDA / P000720), a continuation-in-part of U.S. patent application Ser. No. 10 / 736,437, filed Dec. 15, 2003, issued as U.S. Pat. No. 7,139,003 (Attorney Docket No. NVDA / P000814), and a continuation-in-part of U.S. patent application Ser. No. 11 / 292,614, filed Dec. 2, 2005 (Attorney Docket No. NVDA / P002102). The entire contents of the foregoing applications are hereby incorporated herein by reference.FIELD OF THE INVENTION[0002]One o...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06T1/20
CPCG06T1/20G06F9/3851G06F9/3888G06F9/3854G06F9/38
Inventor LINDHOLM, JOHN ERIKCOON, BRETT W.OBERMAN, STUART F.SIU, MING Y.GERLACH, MATTHEW P.
Owner NVIDIA CORP
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