Methods for forming a semiconductor structure and related semiconductor structures

Abstract

A method for forming a forming a semiconductor structure is disclosed. The method may include: forming a silicon oxide layer on a surface of a substrate, depositing a silicon germanium (Si1-xGex) seed layer directly on the silicon oxide layer, and depositing a germanium (Ge) layer directly on the silicon germanium (Si1-xGex) seed layer. Semiconductor structures including a germanium (Ge) layer deposited on silicon oxide utilizing an intermediate silicon germanium (Si1-xGex) seed layer are also disclosed.

Description

FIELD OF INVENTION[0001]The present disclosure generally relates to methods for forming a semiconductor structure and particular to methods for depositing a germanium layer over a silicon oxide layer utilizing an intermediate silicon germanium (Si1-xGex) seed layer. The present disclosure also generally relates to semiconductor structures and particularly semiconductor structures including a germanium layer deposited over a silicon oxide layer utilizing an intermediate silicon germanium (Si1-xGex) seed layer.BACKGROUND OF THE DISCLOSURE[0002]As semiconductor devices continue to decrease in size in advanced technology nodes, a number of challenges arise in developing higher performance devices. One approach to increase the performance of semiconductor devices is to increase the carrier mobility, i.e., electrons and / or holes, in the channel region of the device. Although it is possible to obtain higher carrier mobilities with strained silicon, much higher mobilities may be achieved by...

AI Technical Summary

Benefits of technology

This patent describes a method for creating a semiconductor structure by depositing layers of silicon oxide, silicon germanium, and germanium on a substrate surface. The method allows for the growth of high-quality layers that can be used in a variety of semiconductor applications. The technical effects of this invention include the improved quality and efficiency of semiconductor device fabrication.

Problems solved by technology

As semiconductor devices continue to decrease in size in advanced technology nodes, a number of challenges arise in developing higher performance devices.

However, using a bulk material other than silicon presents a huge integration and device design challenge.

For example, diffusion enhancement of n-type dopants in germanium (Ge) makes it very challenging to obtain advantageous ultra-shallow junctions.

Moreover, the majority of process steps commonly utilized in silicon device fabrication, such as silicidation and surface cleaning, are currently unsatisfactory for high mobility materials.

However, germanium (Ge) deposition directly on a silicon oxide surface may be problematic because the common germanium deposition processes, utilizing germane (GeH4) as the germanium precursor, do not deposit germanium directly on silicon oxide surfaces.

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