Programming NAND flash with improved robustness against dummy wl disturbance
a programming nand flash and robustness technology, applied in the field of flash memory, can solve the problems of dummy word lines becoming more likely, and dummy cell charge trapping, so as to reduce the boosted potential of the first dummy memory cell, reduce the disturbance, and weaken the associated hot carrier
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[0033]The following description will typically be with reference to specific structural embodiments and methods. It is to be understood that there is no intention to limit the technology to the specifically disclosed embodiments and methods but that the technology may be practiced using other features, elements, methods and embodiments. Preferred embodiments are described to illustrate the present technology, not to limit its scope, which is defined by the claims. Those of ordinary skill in the art will recognize a variety of equivalent variations on the description that follows.
[0034]FIG. 1 is a simplified cross-sectional view of a memory device comprising a plurality of memory cells arranged in series in a semiconductor body (e.g. 105), such as can be applied for a NAND string (e.g. 101) in a NAND array. As shown in the example of FIG. 1, the NAND string is biased during a bit line pre-charge time interval, according to a programming method using a one-step waveform for dummy word...
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