CMOS image sensor
a cmos image sensor and pixel technology, applied in the field of cmos image sensors, can solve the problems of difficult to dispose more than one contact, difficult to dispose two contacts at the floating diffusion node, and misalignment defect at a region b
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first embodiment
[0047]Referring to FIG. 6, a layout of a pixel of a CMOS image sensor consistent with the first embodiment shows gate patterns Tx1 and Tx2 of transfer transistors, each gate pattern disposed to contact photodiodes PD1 and PD2, respectively.
[0048]A floating diffusion node FD is disposed at a region between the two gate patterns Tx1 and Tx2 of the transfer transistors. A gate pattern Rx of a reset transistor, a gate pattern Dx of a drive transistor, a gate pattern Sx of a select transistor, and active regions ACTIVE1 and ACTIVE2 are disposed.
[0049]The gate pattern Sx of the select transistor and the gate pattern Dx of the drive transistor share the active region ACTIVE2 in common. The gate pattern Sx of the select transistor is formed in a “” shape.
[0050]The gate pattern Rx of the reset transistor has the active region ACTIVE1 independently isolated from the active region ACTIVE2. A portion of the gate pattern Dx of the drive transistor is formed between the active region ACTIVE1 and ...
second embodiment
[0055]FIG. 8 illustrates a layout diagram of a CMOS image sensor consistent with the present invention.
[0056]The CMOS image sensor consistent with the second embodiment has a similar layout to the CMOS image sensor consistent with the first embodiment of this invention. However, the CMOS image sensor consistent with the second embodiment includes a contact CTx in a butting contact structure, simultaneously contacting a floating diffusion node FD and a gate pattern Dx of a drive transistor, unlike the CMOS image sensor consistent with the first embodiment which includes forming the contact CT1 contacting the floating diffusion node FD, the contact CNT6 contacting the gate pattern Dx of the drive transistor, and the metal line M2A, separately.
[0057]In particular, the gate pattern Dx of the drive transistor and the floating diffusion node FD are partially overlapped to allow the contact CTx to simultaneously contact the floating diffusion node FD and the gate pattern Dx of the drive tr...
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