Methods for fabricating integrated circuits using directed self-assembly chemoepitaxy

Abstract

Methods for directed self-assembly (DSA) using chemoepitaxy in the design and fabrication of integrated circuits are disclosed herein. An exemplary method includes forming an A or B-block attracting layer over a base semiconductor layer, forming a trench in the A or B-block attracting layer to expose a portion of the base semiconductor layer, and forming a neutral brush or mat or SAMs layer coating within the trench and over the base semiconductor layer. The method further includes forming a block copolymer layer over the neutral layer coating and over the A or B-block attracting layer and annealing the block copolymer layer to form a plurality of vertically-oriented, cylindrical structures within the block copolymer layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the benefit of priority to U.S. Provisional Patent Application Ser. No. 62 / 030,148, filed on Jul. 29, 2014, the contents of which are herein incorporated by reference in their entirety.TECHNICAL FIELD[0002]Embodiments of the present disclosure are directed to methods for fabricating integrated circuits. More particularly, embodiments of the present disclosure are directed to methods for directed self-assembly (DSA) using chemoepitaxy in the design and fabrication of integrated circuits.BACKGROUND[0003]An integrated circuit device typically includes a network of circuits that are formed over a substrate. The device may include several layers of circuit wiring, with various interconnects being used to connect these layers to each other and any underlying transistors. Generally, as a part of the manufacturing process, vias or contact holes are formed, which are transferred to another layer and then filled with a metal ...

AI Technical Summary

Benefits of technology

This method enhances design flexibility and reduces material costs by minimizing sensitivity to filling conditions and material selection, enabling the formation of features with smaller critical dimensions and varied pitches, thus overcoming the limitations of prior art techniques.

Problems solved by technology

However, the dimensions of features formed using conventional optical lithography techniques for volume manufacturing (e.g., 193 nm dry and immersion lithography) have reached the resolution limit of the lithographic tools.

The creation of vias with smaller critical dimensions (CDs), tighter pitches, and better CD uniformity is one of major challenges for future technology nodes.

However, printing such via patterns beyond the 22 nm node is expected to be difficult using conventional optical lithography, even with expensive and complicated double patterning processes, resolution enhancement technology (computational lithography), and severe layout design restrictions.

Unfortunately, no alternative non-optical lithographic technique with higher resolution capabilities, such as electron-beam lithography or extreme ultraviolet lithography (EUV), appears to be ready for high volume manufacturing in the near future.

While electron-beam direct write lithography is capable of very high resolution, it is a direct-write technique and cannot achieve the necessary wafer throughput levels to make it viable for volume manufacturing.

However, many challenges associated with the source, collection optics, masks, and resists still remain and will likely delay any practical implementation of EUV lithography for several years.

However, without any guidance from the substrate, the microdomains in a self-assembled block copolymer thin film are typically not spatially registered or aligned.

In current practice, however, both graphoepitaxy and chemoepitaxy suffer from several drawbacks.

Non-optimal BCP filling conditions (such as over-filling or under-filling) will lead to un-desired morphology from DSA and hence defects through pattern transfer.

To obtain uniform filling conditions across the wafer, the pattern features (such as contact holes and vias) need to be evenly distributed, which requires strict control of pattern pitch and hence limits the flexibility of design.

Further, the pattern features need to have vertical sidewall angle for proper DSA and good thermal stability to endure the DSA annealing process, which severely limits the selection of materials and hence raises the cost of materials.

Accordingly, the post-DSA features are limited to one pitch with one packing symmetry (hexagonal packing), which likewise has severely-limited design flexibility.

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