28 results about "Computational lithography" patented technology

Systems and methods are provided for automated generation of optical proximity correction (OPC) recipes for producing photomasks for patterning semiconductor wafers, thereby improving the overall efficiency and effectiveness of computational lithography in modern semiconductor manufacturing. According to at least one embodiment, an OPC recipe is generated by a two-stage process that includes a reinforcement learning (RL) stage, for generating OPC actions for representative design patterns, and a large language model (LLM) stage, for generating an OPC recipe based on the OPC actions provided by the RL stage.

The present application relates to the field of computing lithography, in particular to a kind of profile acquisition method, device, computer equipment and storage medium of SEM image. Method includes the following steps: obtaining the SEM image to be processed and extracting several profile points from SEM image;Using clustering algorithm to group several profile points;Using first preset algorithm to solve the connection order of each group of profile points;With the connection order obtained by first preset algorithm as heuristic, and using second preset algorithm to solve the connection order of all profile points;And with the connection order obtained by second preset algorithm to connect all profile points in order.The connection speed of the profile acquisition method of the present application is fast and the calculation amount is low.The profile acquisition device, computer equipment and storage medium of the present application have the same beneficial effects as the profile acquisition method of SEM image, which will not be described here.

A non-transitory computer-readable medium stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations for optimizing an illumination source and mask used in a lithography process. The operations include obtaining a pupil profile. The operations also include simulating the lithography process using the pupil profile to generate predictions resulting from the lithography process. The operations also include calculating a cost function based on the predictions. The cost function includes a linear fading effect term that is indicative of a linear fading effect on the predictions. The operations also include adjusting the pupil profile based on the linear fading effect term.

This invention discloses a physical world model-driven multi-stage computational lithography evolution reasoning method, which can unfold the lithography state in the potential state space of each stage and, combined with process intervention strategies, achieve high-precision modeling and optimization of the lithography pattern evolution process. The method includes the following steps: Step 1, constructing a complete dataset by collecting lithography data under different layout and process parameter combinations; Step 2, mapping the physical state of each stage of the lithography process to the potential space, and modeling the potential state of each stage using a spatial embedding method; Step 3, establishing a process intervention strategy model in the potential space, and planning process adjustment schemes for different stages; Step 4, establishing a state transition model to simulate the continuous evolution of the potential state between stages, predicting the potential state of the next stage through the current stage potential state and intervention strategy, and achieving continuous deduction of the lithography state by iteratively updating the intervention scheme.

The invention relates to a computational lithography modeling and hot spot detection method and device based on self-supervised learning, and the method comprises the steps: constructing a neural network model which comprises a layout feature encoder, a geometric reconstruction branch and a lithography space image prediction branch, and enabling a differentiable optical simulation layer to be built in the lithography space image prediction branch so as to integrate physical prior; after an input layout is masked based on label-free mask plate graph data, the model is driven to execute pre-training of geometric reconstruction and photoetching space image prediction at the same time, an original unmasked layout is processed through the differentiable optical simulation layer to generate a pseudo-true value, and a supervision signal is provided for photoetching space image prediction; and on the basis of the pre-training model, performing fine tuning by using a small amount of labeled data to realize hotspot detection. The differentiable optical simulation layer is integrated into the self-supervised learning framework, so that the model can learn the optical law from massive label-free data, the dependence on labeled data is reduced, and the hotspot detection capability and accuracy of unknown graphs are improved.

The present application relates to a kind of determining contact hole photolithography process condition method.The present application obtains the photolithography process condition by combining calculation lithography with design experiment: the target film thickness of the anti-reflection coating to be applied, the target film thickness of resist, target illumination parameter, at least one target exposure anchor point, and then the photolithography process verification is carried out on the aforementioned obtained photolithography process condition by changing energy margin and focusing depth on prefabricated substrate, to determine the contact hole photolithography process condition.The present application is suitable for 55nm-65nm technology node non-immersion photolithography process development, saves time and economic cost for 55nm-65nm technology node new product research and development and introduction, and effectively improves product yield.

The invention provides a monitoring device and a monitoring method for monitoring the quality of a coated photoresist, the monitoring device comprises a transmitting device, a receiving device and two angle adjusting devices, the transmitting device transmits laser containing S polarized light and P polarized light to the surface of the coated photoresist; the receiving device separates S polarized light and P polarized light in the reflected light reflected by the photoresist and respectively receives the S polarized light and the P polarized light; the first angle adjusting device adjusts the angle of the emitting device so as to adjust the included angle between the incident light and the vertical direction. The second angle adjusting device adjusts the included angle between the receiving device and the vertical direction to receive the reflected light. The monitoring device is used for measuring the Brewster angle of the photoresist so as to calculate the refractive index of the photoresist, and the quality of the photoresist is judged on the basis of the mapping relation between the refractive indexes under different Q-times after the photoresist is coated and key parameters and yield of a photoetching process, so that the purpose of monitoring the quality of the coated photoresist is achieved.

The application relates to the field of photoetching technology, in particular to a method and device for calculating a focus point of a photoetching light beam and a computer device, the method comprises the following steps: S0, acquiring a critical dimension of a mask pattern; S1, establishing a focus depth model according to the critical dimension and a preset optical modeling model; S2, under a preset metrology level, bringing the critical dimension into the focus depth model, and calculating a focus point offset of the critical dimension and feature information through a preset first algorithm; and S3, calculating a final focus point of the critical dimension through a preset second algorithm according to the focus point offset and the feature information. The method provided by the application considers the focus point offset and the focus depth information, and can more accurately find the focus point of the photoetching light beam.

The present application relates to the field of computing lithography, in particular to a kind of overlay mark screening method, readable storage medium and program product, overlay mark screening method includes the following steps: obtaining the characteristic parameter of overlay mark to be screened;Obtain the optical parameter of overlay measurement, and establish optical model according to optical parameter;Characteristic parameter is brought into optical model and at least two overlay errors in the preset range are set, and then the asymmetry result of overlay mark to be screened is simulated and calculated;Overlay error and asymmetry result are calculated by linear fitting, and fitting result is obtained;According to fitting result, overlay mark to be screened is screened.The overlay mark screening method provided by the present application can screen out overlay mark prone to larger measurement error.

Various methods of training a machine learning model associated with a patterning process are described herein. A method for training a machine learning model configured to predict a mask pattern is described herein. The method comprises obtaining: (i) a process model of a patterning process configured to predict a pattern on a substrate, wherein the process model comprises one or more trained machine learning models; and (ii) a target pattern; and training, by the hardware computer system, a machine learning model configured to predict the mask pattern based on the process model and a cost function that determines a difference between the predicted pattern and the target pattern.

A non-transitory computer-readable medium stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations for simulating a lithography process. The operations include obtaining a physics-informed neural network (PINN) comprising multiple channel. A first channel of the multiple channels is associated with a first set of physical characteristics of an interaction between an electromagnetic (EM) field and a thick mask used in the lithography process. A second channel of the multiple channels is associated with a second set of physical characteristics of the interaction that is different from the first set of physical characteristics. The operations also include executing the PINN using the first channel to generate a near-field image representation of the EM field for the thick mask with the second channel disabled.

The invention belongs to the technical field of holographic lithography, and provides a mask construction method based on digital holographic calculation lithography, which comprises the following steps: 1, reversely constructing complex plane distribution of mask emergent waves based on a target lithography image; 2, modeling is carried out according to a light field regulation and control method, and an illumination wavefront initial value and a mask initial value are calculated through numerical values; 3, alternately optimizing the mask Um and the illumination wavefront U1 through variational inference; and 4, repeating the step 3 until the constructed mask Um meets a process processing constraint condition. According to the method, the technical problem that a mask construction method is lacked in digital holographic calculation photoetching is effectively solved, and a reliable solution is provided for construction of a next-generation high-precision holographic calculation photoetching mask.

A layout is used in a computational lithography process. For example, the layout may be the layout of the lithographic mask or the layout of the desired resist shape. The layout is made up of multiple disjoint shapes. At least some of the disjoint shapes are represented by parametric curve representations, rather than polygons or other rectilinear representations. The parametric curve representations of the shapes are then used in the computational lithography process.

The invention belongs to the technical field of computational lithography, and particularly discloses a sub-resolution auxiliary pattern two-dimensional structure thick mask near-field modeling method, which comprises the following steps: generating a two-dimensional reference mask corresponding to each size in a size sequence based on the size sequence, the size sequence comprising a plurality of sizes, and the difference between two adjacent sizes in the size sequence being a preset step length; performing strict physical simulation on the two-dimensional reference masks corresponding to the sizes to construct a near-field distribution function library; based on the size of the two-dimensional structure of each SRAF graph in the design layout, an adaptive near-field distribution function is extracted from the near-field distribution function library through an interpolation method, corresponding multi-channel image convolution is carried out, and a near-field distribution image of the two-dimensional structure of each SRAF graph in the design layout is obtained; and constructing a thick mask near-field distribution image of a whole-layout SRAF graph two-dimensional structure through near-field mutual superposition. According to the method and the device, the SRAF graph two-dimensional structure thick mask near field can be quickly and accurately constructed.

The present application relates to the field of semiconductor manufacturing and computer lithography, and particularly relates to a contour extraction method and device of SEM image, computer equipment and storage medium. The contour extraction method of SEM image comprises the following steps: extracting M discrete contour points from the SEM image, wherein M is an integer; randomly selecting N initial control points, and obtaining an initial Bezier curve based on the N initial control points, wherein N is an integer and N is less than or equal to M; calibrating the N initial control points to gradually fit the initial Bezier curve with the M contour points to obtain a calibrated Bezier curve; and outputting the calibrated Bezier curve as the contour information extracted from the SEM image. The contour extraction method of the present application solves the technical problems of large data volume of contour extraction results and loss of contour information in the existing contour extraction technology of SEM image. The contour extraction device, computer equipment and storage medium of the present application have the same beneficial effects as the contour extraction method.

The invention belongs to the technical field of computational lithography, and particularly discloses a sub-resolution auxiliary graph three-dimensional near-field rapid modeling method and device, and the method comprises the steps: generating a reference SRAF mask based on the geometric structure of a to-be-modeled SRAF mask graph; physical simulation is carried out on the reference SRAF mask, and an SRAF graph near-field kernel function set is constructed; extracting a geometric center line of the to-be-modeled SRAF mask graph, and differentiating the geometric center line to obtain a differential fragment set; generating SRAF center line images under different widths based on the differential fragment set; extracting near-field kernel functions respectively corresponding to the SRAF midline images under the different widths from the SRAF graph near-field kernel function set; and on the basis of the SRAF center line images under the different widths and the near-field kernel functions corresponding to the SRAF center line images under the different widths, constructing SRAF near-field distribution. According to the method, the near-field modeling efficiency and modeling precision of the SRAF graph with any curve shape can be effectively improved.

This invention discloses a simulation method and apparatus for photolithography latent images, relating to the field of computational lithography technology in integrated circuit manufacturing, to solve the problem of low simulation prediction efficiency for wafer 3D latent images in the prior art. The method includes: acquiring a target simulation mask pattern and a target simulation front-layer structure pattern; performing pre-detection on the target simulation mask pattern to obtain target reference points; cropping the target simulation mask pattern and the target simulation front-layer structure pattern according to a preset length, centered on the target reference points, to obtain multiple sets of target local patterns; when no pattern identical to the multiple sets of target local patterns exists in the target database, obtaining multiple target local 3D latent images corresponding to the multiple sets of target local patterns based on the target network model used to generate local 3D latent images; and stitching the multiple target local 3D latent images together to obtain the photolithographic 3D latent image of the target simulation mask pattern; thus improving the simulation prediction efficiency for wafer 3D latent images.

The invention relates to the technical field of semiconductor manufacturing, and particularly discloses a method for eliminating non-target pattern scattering defects of a mask. The method comprises the following steps: coating photoresist on the surface of a silicon wafer, placing a mask with a target pattern in a photoetching machine, setting the size of an initial exposure light beam, and exposing and developing the silicon wafer coated with the photoresist to obtain a silicon wafer with a photoetching pattern; testing and calculating a size deviation value between the photoetching pattern and the target pattern; and according to the size deviation value, reducing the exposure beam size of the photoetching machine, and carrying out exposure and development treatment on the silicon wafer of which the surface is coated with the photoresist to obtain the silicon wafer of which the surface is provided with the target pattern. By accurately adjusting the size of the exposure light beam of the photoetching machine, the scattered light generated by the non-target pattern of the mask plate is effectively weakened, so that the photoetching defect caused by the scattered light is eliminated, the yield is improved, and the technical problem that the chip defect is caused by marking projection of stray light in the existing projection type photoetching process is solved.

A method and system for simulating a fall-off effect in lithography are described herein. A pattern or a cut line is selected for monitoring the fall-off effect based on its fall-off sensitivity. The fall-off sensitivity can be determined based on (a) a spatial derivative of a fall-off image or (b) a second derivative of a spatial image of the pattern. A fall-off source representing a scan position dependent illumination pupil profile of a lithography apparatus is obtained, and a fall-off image is determined using the fall-off source. A fall-off sensitivity indicator is determined based on a spatial derivative of the fall-off image. A feature vector representing the pattern using a derivative of the fall-off sensitivity indicator. The feature vector is grouped, and a set of patterns is selected for monitoring the fall-off effect based on the grouping.

The invention relates to a front-layer structure-containing photoetching latent image rapid calculation method suitable for a large-area mask, belongs to the field of calculation photoetching, and solves the problem of long calculation time in the prior art. Comprising the following steps: performing local feature pattern extraction on a typical mask pattern in production and manufacturing, and establishing a mask library and a three-dimensional latent image library; splitting the large-area mask pattern and the front-layer structure to obtain a small mask pattern, a local feature pattern and a local front-layer structure pattern, and calculating to obtain a three-dimensional latent image library; comprising the following steps: if a local feature pattern is in a mask library and a front-layer structure pattern is in a three-dimensional latent image library of the local feature pattern, directly obtaining a corresponding local three-dimensional latent image; otherwise, calculating to obtain a corresponding local three-dimensional latent image by using the trained CGAN network model; and dot product calculation and splicing are carried out on the small mask pattern and the local three-dimensional latent image, and a three-dimensional latent image of the large-area mask pattern is obtained. And an accurate and rapid photoetching latent image calculation method is realized.

The application provides a task scheduling method for computing photolithography and related products. The task scheduling method comprises the following steps: obtaining a dependency relationship between each two of a plurality of task packages for computing photolithography; dividing the plurality of task packages into a plurality of batch groups arranged in sequence according to the dependency relationship; determining an intra-group execution priority of each task package in each batch group; and distributing each task package to a computing node for computing photolithography in sequence based on the batch group to which the task package belongs and the intra-group execution priority. The method avoids traffic congestion of the computing nodes of the task packages in the batch groups and between the batch groups, improves the parallelism of photolithography computation, improves the overall linearity of the distributed computing nodes, and reduces the total running time.

The invention relates to a light source optimization method and system under a partial coherence imaging calculation model, belongs to the technical field of calculation photoetching, and solves the problem that an EUV photoetching SO algorithm considering light source coherence is lacked in the prior art. The method comprises the following specific steps: respectively calculating an electric field generated by each light source point in an effective light source through coherent imaging in combination with a mask three-dimensional effect; on the basis that the electric field generated by each light source point is superposed with the electric fields generated by all the coherent light source points, the total light intensity generated by each light source point is calculated in combination with the light source intensity and light source coherence degree conditions of the light source points; accumulating the total light intensity generated by all the light source points to obtain the light intensity of the output image under the condition of the coherence degree, and calculating the developed output image; the developed output image is utilized to optimize the light source based on a gradient optimization algorithm to obtain an optimized light source, so that a high-resolution photoetching imaging result is realized, and the blank of an EUV photoetching SO algorithm of light source coherence is solved.

The present application relates to the field of computing lithography, in particular to a kind of photolithography model construction method, comprising the following steps: obtaining the actual exposure imaging result of part SRAF pattern on wafer;Establish initial lithography model, image measurement plane and light intensity threshold are added to initial lithography model as variable;Part SRAF pattern is substituted into initial lithography model to simulate, and based on different image measurement plane and light intensity threshold, the simulation result corresponding to part SRAF pattern is obtained;Compare simulation result with actual exposure imaging result, the image measurement plane and light intensity threshold corresponding to the simulation result with highest similarity are recorded as optimal simulation point;According to optimal simulation point, initial lithography model is calibrated, and prediction lithography model is obtained.The present application also provides a kind of prediction SRAF pattern exposure imaging method and program product, solve the problem that traditional OPC lithography model cannot accurately predict SRAF exposure imaging result.

The application relates to the field of computing lithography technology, in particular to a SEM (Scanning Electron Microscope) pattern contour point analysis method and device, computer equipment and program product, which comprises the following steps: acquiring a SEM image to be analyzed, and calculating the directional derivative of each pixel in the SEM image; selecting a pixel point as a main point, marking a main point visual field in a preset range with the main point as the center, and marking the pixel points in the main point visual field except the main point as slave points; calculating the similarity of the main point and the slave points according to the directional derivatives of the main point and the slave points, and judging whether the main point is a contour point according to the calculation result. The application further provides a SEM pattern contour analysis device, computer equipment and program product, unnecessary time cost in a layout design process is saved, and the efficiency of the design process is improved.

The invention discloses a photoresist rapid modeling method and system with variable development time, relates to the field of computational lithography, solves the theoretical defects of an existing photoresist rapid simulation model based on deep learning, and can predict the outlines of developed photoresists with different development time according to an input lithography space image. According to the scheme, relevant parameters are set according to an actual use scene, and a space image-developing time data set of a deep learning photoresist model is established; and constructing a deep learning network by taking the process parameters and the photoetching space image as input and taking the development time distribution image as output, and training on the simulation space image-development time data set to obtain a pre-trained deep learning network. The method comprises the following steps: preprocessing any given photoetching space image, inputting the preprocessed photoetching space image into a pre-trained deep learning network, calculating to obtain a two-dimensional development time distribution image, and finally carrying out threshold processing to obtain a photoresist contour after any development time.

The present application relates to the technical field of computing lithography image analysis, and particularly relates to a SEM image foreground extraction method, device, computer equipment and storage medium. The method comprises the steps of: obtaining a SEM image to be processed and binarizing the SEM image; detecting all connected domains in the binarized SEM image and performing first labeling; splitting the SEM image based on the first labeling; performing contour extraction on each split SEM image to obtain a contour extraction image and performing second labeling; and performing image splicing on the contour extraction image based on the second labeling to obtain a SEM image foreground image. The foreground extraction method of the present application has greatly increased accuracy and high splitting speed. The extraction device, computer equipment and storage medium of the present application have the same beneficial effects as the SEM image foreground extraction method, and will not be described here again.

The invention discloses a multi-dot-matrix calculation photoetching system self-correction method and device based on AI driving optimization, the method utilizes a DMD and a camera of the system to directly put an optimization result of an optimizer into an actual optical system, and compared with a prediction result obtained through a mathematical model, a more accurate result can be efficiently obtained, and the accuracy of the system is improved. Influences of aberration, disturbance, environment and other factors which are difficult to predict in a complex system can be overcome. In addition, the deviation between the optimized result and the target value is quantified through the reward function, the advantages and disadvantages of the current DMD hologram group can be accurately evaluated, the DMD hologram with the high reward value is evolved in the updating process, certain updating exists while the advantages of the last round of DMD hologram are inherited, and the updating efficiency is improved. Therefore, the DMD hologram with a higher reward value can be obtained with a larger probability in the next iteration process.

The invention discloses a method, equipment and a product for extracting repeated patterns of a chip design layout, and relates to the technical field of semiconductor computational lithography. The method comprises the following steps of: extracting a target repeated graph group of which the repetition degree meets a preset condition from each layout region; because the repetition degree is determined by the repetition times of the target repetition graph group in the layout area and the number of graphs in each target reuse graph group, the repetition times in the target repetition graph group meeting the preset condition are more or the number of graphs included in the graph combination is more. Therefore, by extracting the graph combination of which the repetition degree meets the preset condition, each graph which appears frequently in the layout area can be represented, and a target repeated graph group with high precision and high repeated graph extraction rate is obtained, so that the number of graphs for optical proximity correction and design rule inspection is reduced, and the inspection efficiency is improved.