This invention discloses a
chip manufacturing
system and method based on global feature targeting. Using the inherent features of the workpiece itself in each
chip manufacturing process as the sole targeting benchmark, it eliminates the need for dedicated alignment marks, calibration boards, standard templates, and manual calibration. Through unified feature acquisition, feature targeting calculation, dynamic closed-loop correction, and full-process collaborative control, it achieves integrated precision manufacturing across the entire process, including
wafer cleaning, thin film deposition,
photolithography alignment,
etching,
ion implantation, annealing, CMP
polishing, defect detection and repair, advanced packaging bonding, measurement, transmission, and sorting. The
system consists of a global feature sensing unit, a feature targeting calculation center, a full-process collaborative
control unit, a multi-process precision
execution unit, and a full-process closed-loop feedback optimization unit. It adopts a coaxial common
field of view, common motion platform, unified
clock synchronization, and vacuum-compatible integrated architecture, adapting to advanced processes of 3nm and below. The
overlay error is improved by ≥20% compared to existing solutions, significantly improving manufacturing accuracy, yield, and efficiency, reducing equipment dependence and production costs, and forming a fundamental technological barrier for the entire
chip manufacturing process.