Hub, memory module, memory system and methods for reading and writing to the same

Abstract

A central unit, a memory module, a memory system and methods for reading and writing the same. In the test mode, memory module, memory device, or memory cell identification information can be ignored, so that all memory modules, memory devices, or memory cells can be tested for write or read. Ignoring memory identification information may allow all memory modules, memory devices, or memory cells to be written or read at the same time, thereby reducing test time.

Description

technical field [0001] The present invention generally relates to a central unit, a memory module, a memory system and methods of reading and writing thereto. Background technique [0002] figure 1 Several conventional memory module types are described, including single inline memory modules (SIMMs) and dual inline memory modules (DIMMs). SIMMs have memory slices on one side of the memory module, where DIMMs have memory slices on both sides of the memory module. DIMM can also be defined as registered DIMM (R-DIMM) and fully buffered DIMM (FBDIMM). [0003] In R-DIMMs, signals other than data signals are transferred from the memory controller to the memory slices via one or more registers. In FBDIMMs, all signals from the memory controller are routed to the memory slices through a central unit (hub) or advanced memory buffer (AMB). Such as figure 1 As shown, FBDIMMs are advantageous for higher speed and / or higher density applications. [0004] figure 2 A conventional ...

AI Technical Summary

Problems solved by technology

All other memory modules MM2-MMn do not perform write operations because they are not identified by the module select bits

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