Communication method between two processors

A dual-processor, communication method technology, applied in the direction of electrical digital data processing, instruments, computers, etc., can solve the problems of increased hardware design difficulty and cost, poor flexibility and versatility, shorten the cycle of integration and transplantation, realize Real-time communication, the effect of isolating differences

Active Publication Date: 2007-08-08
SANECHIPS TECH CO LTD
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Problems solved by technology

However, this method also needs to design a special bus control circuit to realize the time-sharing access of the two p...

Method used

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  • Communication method between two processors
  • Communication method between two processors
  • Communication method between two processors

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Embodiment Construction

[0021] The basic idea of ​​the present invention is that in a system including processor A and processor B, processor B triggers the interrupt of processor A twice at a fixed time interval, and after the interrupt is triggered, processor A and processor B simultaneously A read or write operation is performed on a specific area of ​​the DPRAM to realize two-way data and message communication between processor A and processor B during the time interval.

[0022] The present invention will be described in detail below with reference to the drawings and embodiments.

[0023] FIG. 1 is a schematic structural diagram of a dual-processor system communicating through DPRAM. As shown in FIG. 1 , the system includes processor A, processor B and DPRAM. Wherein, processor A and processor B are connected with DPRAM by address and data bus. In addition, there is an interrupt control line between processor A and DPRAM.

[0024] Among them, processor A is usually an embedded processor with ...

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Abstract

This is a communication method for dual-processors. The DRAM is divided into four non-overlapping memory regions: the first storage area, the second storage area, the third storage areas and the fourth storage area. The second processor alternately triggered the first processor's interrupt periodically: first interrupt and the second interrupt. After the first interrupt is triggered, before triggering the second interrupt, the second processor reads the communication data stored in the first storage area, and writes the communication data to the third storage area. As a response to the first interrupt, the first processor writes the communication data in the second storage area, and reads the communication data stored in the fourth storage area. After the second interrupt is triggered, before triggering the first interrupt, the second processor reads the communication data stored in the second storage area, and writes the communications data to the fourth storage area. As a response to the second interrupt, the first processor writes the communication data in the first storage area, and read the communication data in the third storage area.

Description

technical field [0001] The invention relates to a multi-processor communication method, in particular to a communication method between dual processors through DPRAM (Dual Port RAM, dual-port random access memory). Background technique [0002] In fields where computer systems are widely used, such as communications and multimedia processing, with the continuous increase in the amount and complexity of processed data, it is difficult for a system including a processor to meet the user's requirements for real-time and processing capabilities. Therefore, large and complex systems often contain two or more processors, each of which performs its own task. In addition, different types of processors are required for different tasks in some systems. For example, the control function and data operation are handed over to different processors for processing, so as to achieve the best system performance. [0003] As a system, multiple processors need to exchange data in real time to...

Claims

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Application Information

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IPC IPC(8): G06F15/167G06F13/24
Inventor 吴利予
Owner SANECHIPS TECH CO LTD
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