Method and system for realizing one board forced resetting

Abstract

The invention discloses a method and system to realize mandatory reduction of single-desk, which core is: a system acquires the corresponding reduction information according to the demands of different components, and transforms the information to boundary scan device BS in the single-desk with function of logic or dealing through system bus on the backplane. Based on the reduction information, the BS device takes induction on the corresponding device. Under the conditions of abnormal single-desk business and normal dog-software working, this invention can achieve the reduction of single-desk through standard system bus. Moreover, it's more flexible to achieve reduction through system bus, and doesn't need software support to take reduction when the single-desk appears unknown breakdown.

Description

technical field

[0001] The invention relates to the communication field, in particular to a single board reset technology. Background technique

[0002] In order to solve the test problem of VLSI (Very Large Scale Integration, VLSI), JETAG (Joint European Test Action Group, European Joint Test Action Group) established by Philips, Siemens and other companies proposed a boundary scan technology, which set A BSC (Boundary Scan Cell, Boundary Scan Cell) between the input and output pins of the device on the single board and the core circuit of the device is used to test the device and its peripheral circuits. Later JETAG was renamed JTAG (Joint Test Action Group, Joint Test Action Group). In 1990, IEEE officially recognized the JTAG standard, which was named IEEE1149.1-90 standard after supplementation and revision. The IEEE1149.1 standard has greatly promoted the development and wide application of boundary scan technology.

[0003] Now the application of boundary scan tech...

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