Net-list organization tools

A network and organizational technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as ignorance

Active Publication Date: 2007-10-31
TECHINSIGHTS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Also, errors do occur during the reverse engineering process itself, such as errors in the image layout or misidentified gates or transistors during circuit readback, which are not known during IC verification

Method used

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Embodiment Construction

[0031] The present invention provides a fast and efficient method of identifying subcircuits within an integrated circuit (IC) netlist, thereby creating a hierarchical representation of the netlist. Figure 1 shows an overview of the method of the invention in flow chart form.

[0032] The first part of the method is used to develop a gate-level netlist 110, which can be done by means of signal trace and circuit readback. It is not necessary to extract the full circuitry of the IC to generate the netlist. The invention also works with netlists of parts of the circuit. Once the network list has been obtained, the process of organizing its entries into a hierarchy begins. Hierarchies are created by checking for repeated instances of entries in the netlist and identifying individual entries or combinations thereof as subcircuits. This can facilitate simplified display of network list entry representations. Subcircuits are identified by means of reference graph generation 111 s...

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Abstract

The present invention provides an accurate and efficient method of organizing circuitry from a net-list of an integrated circuit, by the steps of generating a reference pattern; identifying the potential matches in the net-list using inexact graph matching; further analyzing the matches to determine if they match the reference pattern; and organizing the net-list into a hierarchy by replacing the identified instances with higher-level representations.

Description

field of invention [0001] The present invention relates to a method of design analysis of existing integrated circuits, and more particularly to the determination of repeated subcircuits from netlists of reverse engineered integrated circuits. Background of the invention [0002] In the fiercely competitive field of microelectronics, detailed analysis of semiconductor integrated circuit products can provide valuable information on how to deal with specific technical problems, overall strength, and shortcomings of design methods. This information can be used to make decisions about market positioning, future design, and new product development. Likewise, this information can also be key evidence in cases of patent infringement and / or licensing. Information resulting from product analysis is typically provided through circuit extraction (reverse engineering), functional analysis, and other technical means. At the heart of this activity is the process of design analysis, whic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F17/5045G06F30/30
Inventor V·L·扎瓦德斯基E·凯斯S·索科V·冈特S·贝格J·阿布特
Owner TECHINSIGHTS
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