Hierarchical low density check code decoder and decoding processing method

Abstract

A decoder for layered low-density parity-check code and a decoding method in the technical field of communication, wherein the amount of processing module is equal to the parallelism k of the decoder; a first memory cell sends the soft value (bit updating value) transmitted from the information node to the check node in this time of iteration into the processing module; the processing module sends the soft value (check updating value) transmitted from the check node to the information node in this time of iteration into a second memory cell; the second memory cell sends the check updating value transmitted from next layer of check node to the information node in the last iteration to the processing module through a second blending network; the processing module sends the bit updating value transmitted from the information node to next layer of check node in this time of iteration to the first memory cell through a first blending network. In the method, the calculation of layered and modifying minimum sum as well as overflow protection are adopted for node information updating. The invention improves processing efficiency greatly and reduces hardware resource consumption needed by decoder.

Description

technical field [0001] The invention relates to a decoder and a decoding processing method in the field of communication technology, in particular to a layered low-density check code decoder and a decoding processing method. Background technique [0002] LDPC code (low density parity check codes, low density check codes) is a coding technology first proposed by Gallager in 1963. It can be used as an error correction / error detection technology for various communication systems or information storage systems. With the performance approaching the channel limit, it has become a hot technology that has attracted the most attention in the past ten years. LDPC code decoders usually have three structural forms: serial structure, full parallel structure, and partial parallel structure. The serial structure LDPC code decoder has a simple structure and consumes less hardware resources, but the decoding speed is slow and the supported data throughput is low; the fully parallel structur...

AI Technical Summary

Problems solved by technology

However, this decoder structure cannot simultaneously update information node information and check node information, and since the decoder stores the posterior probability likelihood ratio of information nodes, and each information node needs an independent memory, thus consuming more memory resources

In addition, since the decoder uses both the Internet and the shifter to complete the operation, it will consume more hardware resources

Images