ATCA frame based FRU debugging and testing device

A test device and rack technology, applied in the direction of digital transmission systems, electrical components, transmission systems, etc., can solve problems such as no good solutions and products, and achieve the effect of efficient testing and debugging

Inactive Publication Date: 2010-08-18
SHANGHAI BROADBAND TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there are no good solutions and products for FRU debugging and testing based on ATCA racks

Method used

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  • ATCA frame based FRU debugging and testing device
  • ATCA frame based FRU debugging and testing device
  • ATCA frame based FRU debugging and testing device

Examples

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Embodiment Construction

[0027] As shown in Figure 2, a FRU debugging and testing device based on an ATCA rack includes a master digital processor, a slave digital processor, a host computer, and Zone1 (Zone1 defines the address signal of IPMC, the clock and data signal of IPMB bus , defining a dual-way 48V DC power supply signal, etc.) connector, a power conversion module, and two LED indicator lights, wherein the master digital processor and the slave digital processor include a start (Start) bit monitoring circuit, An end (Stop) bit monitoring circuit and a counter for counting the up extension and down extension of SCL at the same time; the master digital processor is connected with the Zone1 connector from the digital processor; the Zone1 connector is used To take power from the rack backplane, and obtain IPMB bus data lines and clock lines and slot address information, etc., the power conversion module is used to convert the voltage obtained by the Zone1 connector from the rack backplane, and res...

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PUM

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Abstract

The present invention relates to an FRU debugging and testing device which is based on an ATCA frame, including a main digital processor, a sub-digital processor and a topper computer. The sub-digital processor is used for collecting the data on the IPMB1 and sending the data to the main digital processor which is used for the receiving of the spot debugging command and the data on the IPMB1 which are sent by the sub-digital processor. The hardware address is collected by the I / O port of the main digital processor and the data on the IPMB0 is collected by the USI of the main digital processor. The data on the IPMB0 and the IPMB1 sent by the sub-digital processor are sent to a topper PC machine. The topper computer is used for sending the debugging command to the main digital processor andreceiving and analyzing the data on the IPMB0 and the IPMB1. The present invention makes the spot FRU debugging or the IPMC debugging intuitive and convenient and can achieve the receiving and analyzing of the IPMB data on the human-computer interface of the topper computer and to explain the content of the whole data packet according to the content of the user.

Description

technical field [0001] The invention belongs to the technical field of advanced telecommunication computing architecture, and in particular relates to a debugging and testing device for field replaceable units (Field Replaceable Units, FRU). Background technique [0002] Currently, leading telecom equipment manufacturers and operators in the industry are supporting a new, open system architecture, the Advanced Telecom Computing Architecture (Advanced Telecom Computing Architecture, referred to as AdvancedTCA, ATCA). ATCA released the board, backplane and software specifications for the next generation of telecommunication equipment: PICMG3.0 specification. It is composed of a core specification - PICMG3.0 and a series of auxiliary specifications. The core specification in the ATCA family defines the organization, power supply, heat dissipation, interconnection, and system management parts in the ATCA series specification; the content of the auxiliary specification defines t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/24H04L12/26
Inventor 李进林清全祝贵根
Owner SHANGHAI BROADBAND TECH
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