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Anti-bypass attack algorithm and chip thereof

A side-channel attack and chip technology, applied in the field of information security, can solve the problem of ignoring the security of modulo reduction operations, and achieve the effect of increasing the difficulty of attack and ensuring security.

Inactive Publication Date: 2008-06-11
SHANGHAI AISINOCHIP ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this method can only guarantee the safety of modular exponentiation, but ignores the safety of modular reduction

Method used

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  • Anti-bypass attack algorithm and chip thereof
  • Anti-bypass attack algorithm and chip thereof
  • Anti-bypass attack algorithm and chip thereof

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Experimental program
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Embodiment Construction

[0068] Embodiments of the present invention will be described in further detail below in conjunction with the accompanying drawings, but the present embodiments are not intended to limit the present invention, and all similar structures, methods and similar changes of the present invention should be included in the protection scope of the present invention.

[0069] The invention proposes a more secure modular reduction algorithm RandRed by introducing random numbers. At the same time, combined with the MIST algorithm, a design method of RSA chip against side channel attack is given.

[0070] After the introduction of random numbers, the operand selection space fixed at one end of the subtraction operation is greatly increased, making the attacker need to determine the operand used for calculation in a large amount of data. To calculate E mod d, the algorithm is described as follows:

[0071] RandRed(E, d) {

[0072] Choose a random number rand;

[0073] d'=d×rand;

[007...

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Abstract

The invention discloses a chip of an RSA arithmetic against side-channel attack and the arithmetic, which relates to the technology field of information security. The chip comprises an interface module for finishing the interaction of data inside and outside of the chip, a random number module (RNG) for generating random number, a memory module (MEM) for storing high number, middle and final results needing to be computed by RSA, a modular exponentiation module (EXP) for completing modular exponentiation computation adopting MIST arithmetic, a module (RED) for completing common modular reduction and computing remainder and factor module reduction and a flow for controlling the whole RSA design to make modular exponentiation computation and module reduction computation operate in parallel and realize control module (CTRL) of randomized module reduction by calling RED. The invention puts forward safer module reduction arithmetic RandRed by introducing random number to render the invention the characteristics of no statistical character and higher attack difficulty.

Description

technical field [0001] The invention relates to information security technology, in particular to a chip for resisting side-channel attack RSA algorithm and technology of the algorithm thereof. Background technique [0002] As an important branch of information security, encryption has been widely concerned. On the one hand, people continue to study the security of the encryption algorithm itself. On the other hand, the implementation of encryption algorithms is also one of the hot topics discussed. A more common understanding is that chips are a good way to implement encryption logic. Implementing the encryption algorithm inside the chip can avoid many disadvantages caused by implementing it with software. The keys in the software implementation are easy to leak, the memory may be scanned, and even the algorithm is tampered with, which can be well solved in the chip implementation. [0003] However, with the development of integrated circuit analysis technology, many at...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/00H04L9/30G06F21/71
Inventor 周玉洁陈志敏秦晗谭咏伟
Owner SHANGHAI AISINOCHIP ELECTRONICS TECH
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