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Semiconductor device and method for manufacturing the same

A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing, can solve problems such as increasing on-state resistance

Inactive Publication Date: 2010-06-02
DONGBU HITEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the structure may lead to an increase in on-state resistance due to an increase in the current path

Method used

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  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] Example figure 2 As shown, an LDMOS semiconductor device according to an embodiment may include an N well region 102 formed in a surface of a silicon substrate 110 . A device isolation layer 103 may be formed in the surface of the silicon substrate 101 including the N well region 102 . The trench 104 exposing a predetermined portion of the uppermost surface of the silicon substrate 101 may be formed by selectively removing a portion of the device isolation layer 103 . P main layer (P + ) can be formed in the trench 104 of the silicon substrate 101 . The gate insulating layer 106 may be formed on and / or over the P-body layer 105 adjacent to the side surfaces of the respective device isolation layers 103 . Gate 107 may be formed on and / or over gate insulating layer 106 .

[0020] The LDD region 108 is formed in the p-body layer (P + )105. Sidewalls 110 of the insulating layer may be formed adjacent to side surfaces of gate 107 and on and / or over LDD region 108 . A...

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PUM

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Abstract

A semiconductor device including a well region formed in a silicon substrate; a trench exposing a predetermined portion of the uppermost surface of the semiconductor substrate; a body layer formed inthe semiconductor substrate at the trench; a device isolation layer formed in the well region; a gate insulating layer formed in the trench over the body layer; a gate electrode formed in the trench over the gate insulating layer and against the device isolation layer; a lightly doped drain region formed in the body layer; an insulating layer formed in the trench over the lightly doped drain region; a source region formed in the body layer; a drain region formed in the well region against the device isolation layer; and a body region formed in the body layer against the source region. The on-resistance can be reduced by forming the gate and source beneath the device isolating layer.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2006-0131435 filed in Korea on December 20, 2006, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to a semiconductor device and a method of manufacturing the same. Background technique [0003] Metal-oxide-semiconductor field-effect transistors (MOSFETs) may have several advantages, such as high input impedance over bipolar transistors, high power gain and simple structure for gate drive circuits due to being unipolar devices, and not due to The accumulation or recombination of minority carriers produces time delay. Therefore, MOSFETs are suitable for use as switch-mode power supplies, lamp ballasts, and motor drive circuits. [0004] For power MOSFETs, a double-diffused MOSFET structure (DMOSFET) using planar diffusion technology has been widely used. It will be important for DMOS transistors for power device applications...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088H01L29/78H01L29/423H01L29/06H01L21/8234H01L21/336H01L21/28
CPCH01L29/66689H01L29/0653H01L29/66704H01L29/42376H01L29/66696H01L29/7825H01L21/2815H01L29/086H01L29/4236H01L21/18H01L29/768
Inventor 高光永
Owner DONGBU HITEK CO LTD