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Method and apparatus for implementing IC device testing

A device and equipment technology, applied in the field of integrated circuit device testing, can solve problems such as not easy to show

Inactive Publication Date: 2008-08-06
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, many of the defects listed above are not readily apparent during standard burn-in testing due to the nature of the specific defects
This is because the effect of many common defects only increases with the passage of time / accumulated charge, or with the continuous application of heat and / or voltage to the affected part
As such, conventional module-level burn-in offers limited success at the expense of yield

Method used

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  • Method and apparatus for implementing IC device testing
  • Method and apparatus for implementing IC device testing
  • Method and apparatus for implementing IC device testing

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[0027] Using a device such as that shown in FIG. 2, data was generated using a 16M embedded DRAM (8SF technology) macro that was found to exhibit a variable retention time (VRT) failure. Variable retention time is a phenomenon driven by dislocations and stacking faults. The module is then operated under the influence of the magnetic field. The results showed that the VRT fault was immediately found at the same fault address, and on the contrary, when using conventional module aging technology to detect, the original test activity took several hours of specific operations before initially identifying it as a "fault." In addition, as soon as the magnetic field source was deactivated (removed), it was found that the VRT failure had been restored.

[0028] Referring now to FIG. 3, according to an exemplary embodiment of the present invention, a schematic diagram of a semiconductor wafer probed for testing with a magnetic field applied thereto is illustrated. In this example, during wa...

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Abstract

The invention relates to a method and device for testing an integrated circuit device includes subjecting the integrated circuit device to an applied magnetic field during the application of one or more test signals, the applied magnetic field inducing magnetostriction effects in one or more materials comprising the integrated circuit device; and determining the existence of any defects within the integrated circuit device attributable to the applied magnetic field.

Description

Technical field [0001] The present invention generally relates to integrated circuit device testing technology and, more specifically, to a method and equipment for implementing integrated circuit (IC) device testing to have improved SPQL (shipped product quality level), reliability, and finished products Rate performance. Background technique [0002] The traditional integrated circuit manufacturing process is a series of steps by which geometric figures or groups of geometric figures are transferred to the operating integrated circuit. An integrated circuit is composed of a stack of conductive, insulating, and device-forming materials. By setting a predetermined geometric shape in each of these layers, an integrated circuit that performs the desired function can be constructed. The overall manufacturing process consists of the patterning of successive layers in a specific order. [0003] Many factors can cause defects in integrated circuits. Some defects are attributed to the i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/303G01R31/265G01R31/27G01R31/02
CPCG11C29/56G01R31/2881G01R33/1207G11C29/006G11C29/50
Inventor A·J·小格来戈里奇
Owner INT BUSINESS MASCH CORP