Chip package structure and its package method
A chip packaging structure, chip packaging technology, applied in the direction of electrical components, electrical solid devices, semiconductor/solid device manufacturing, etc., can solve the problems of increased package thickness, improved short circuit, difficult to effectively control the distance, etc.
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[0019] 2A to 2F are a series of schematic diagrams of a preferred embodiment of the chip packaging method of the present invention. First, as shown in FIG. 2A , a wiring board 220 is provided. At least one finger 222 is formed on the circuit board 220 . The finger can be used to transmit electrical signals to a circuit board (not shown). Subsequently, as shown in FIGS. 2B and 2C , the first chip 240 is installed on the circuit board 220 . The first chip 240 has at least one pad 242 located at the center of the upper surface of the first chip 240 . As shown in the figure, for a preferred embodiment, two rows of bonding pads 242 may be disposed at the center of the upper surface of the first chip 240 .
[0020] Next, as shown in FIG. 2D , make at least one wire (bonding wire) 250 extending from the pad 242 along the upper surface of the first chip 240 toward the edge of the first chip 240, and electrically connected to the circuit board made Finger 222 on 220 . It should be...
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