Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Area compact type BCH paralleling decoding circuit supporting pre searching

A decoding circuit and pre-search technology, applied in the direction of cyclic code, error correction/detection using linear code, error correction/detection using block code, etc. Product reliability and other issues

Active Publication Date: 2011-12-21
NATIONZ TECH INC
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, at present, the capacity of large-capacity NandFlash storage products continues to increase, especially in consumer digital products, the quality of NandFlash is uneven, and the 2-bit error correction performance has been difficult to guarantee the reliability of various NandFlash products.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Area compact type BCH paralleling decoding circuit supporting pre searching
  • Area compact type BCH paralleling decoding circuit supporting pre searching
  • Area compact type BCH paralleling decoding circuit supporting pre searching

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0043] Below in conjunction with the preferred embodiment shown in accompanying drawing, be described in further detail:

[0044] A compact BCH parallel decoding circuit supporting pre-search, such as Figure 1 to Figure 5 As shown, working in the finite field GF(2 13 ), including an adjoint polynomial syndrome operation circuit 1, an error position polynomial iterative circuit 2 and an error address search circuit 3; Passers 4-1 to 4-8 complete the finite field constant coefficient multiplication of the input; the iterative circuit 2 realizes two sets of multiplexers 9 and 10 of the circuit by means of a round of IBM iterative operations, and multiplexes a finite Domain GF(2 13 ) on the two input multipliers 11, when realizing the IBM iterative algorithm, run a round of iterative multi-beat operation; in the wrong address search circuit 3, a full combinatorial logic pre-search module 25 is set; the BCH parallel decoding circuit It is an 8-bit parallel decoding circuit.

...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A compact BCH parallel decoding circuit which supports preview search works on a finite field GF(2<13>). The parallel decoding circuit comprises a syndrome arithmetic circuit(1), a realizing circuit(2)with multiple shoots in one round for IBM wrong position multinomial iterative computation in the finite field GF(2<13>), a wrong address search circuit(3) provided with a totally combined logic pre-search module and a multifunctional configurable data interface(27)of an encoder. Compared with prior art, the decoding circuit has the advantages that the hardware is of low degree of complexity, the circuit area is compact and the decoding circuit is low in cost; data throughput is high and wrong address research is quick; the interface is simple in design and is practical and multi-functional; correcting performance can be flexibly configured according to the length of the check element and is free from the change of the code length.

Description

technical field [0001] The present invention relates to an encoding, decoding or code conversion circuit for error detection or error correction, and in particular to the application of cyclic codes, that is, the polynomial, Bose-Chadhely-Hokkun, which generates check information by cyclically shifting codewords An error control code defined by a Bose-Chaudhuri-Hocquenghem (BCH) code generator, in particular relates to a BCH decoder circuit in a NandFlash structure mass storage device control chip. Background technique [0002] In the control chip of a large-capacity storage device with a NandFlash structure, when data is written into the storage unit, it is necessary to artificially write a part of redundant data according to certain rules for error control, so as to ensure that error detection and error detection are performed when data is read out. Correction. The BCH' code is a code that can correct multiple random errors, which is consistent with the conventional error...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/15
Inventor 张翌维郑新建李美云
Owner NATIONZ TECH INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com