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Method for realizing single board space time synchronization

A time synchronization, single-board technology, applied in the direction of synchronization devices, instruments, electrical digital data processing, etc., can solve the problems of inapplicable time synchronization, increase the internal complexity of the system, etc., achieve accurate synchronization, meet application requirements, and simplify distribution The effect of the process

Inactive Publication Date: 2008-09-03
ZTE CORP
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

However, this method requires each communication port to be able to generate the precise time information of the time synchronization message entering and leaving the port by hardware, so this method will increase the complexity of the system, and is not suitable for the time synchronization between the boards in the system

Method used

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  • Method for realizing single board space time synchronization
  • Method for realizing single board space time synchronization
  • Method for realizing single board space time synchronization

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Embodiment Construction

[0020] The present invention will be further described below in conjunction with the accompanying drawings.

[0021] figure 1 It has been described in the background technology, and will not be repeated here.

[0022] refer to figure 2 , the system clock board distributes a clock signal with a higher frequency to each board through a clock bus as the second pulse signal, which is used for time counting of each board. Generally, frequencies such as 16.384MHz and 25MHz can be selected according to the specific conditions of the system. If the time synchronization accuracy is high, the above clock signal can be multiplied; if the time synchronization accuracy is low, the local clock signal of each board can be used as the second pulse signal instead of the system clock board to be distributed (in this case the figure 2 not shown).

[0023] The system clock board distributes a clock signal with a lower frequency to each board through another clock bus as the first pulse sign...

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Abstract

The invention discloses a method of time synchronism between single plates. The system clock plate distributes a first impulse signal to the respective single plate and the respective single plate time counter receives a second impulse signal and counts. The first impulse signal is a preset reference delay. Respective single plate updates the high position portion of the time counter based on the time message in the time counter buffer and resets the lower position portion in the time counter. Respective single plate realizes the time synchronism recorded by the high position portion and lower position portion of the time counter. The technology scheme realizes the accurate synchronism of the time information among the single plates inside the hardware platform system.

Description

technical field [0001] The invention relates to a method for realizing time synchronization, in particular to a method for realizing time synchronization between single boards. Background technique [0002] At present, the communication hardware platform system has higher and higher requirements for the accuracy of time synchronization between boards. The existing processing method is that the clock signal is distributed by the system clock board to each board through the clock bus to achieve synchronization, and the time information is passed through the Ethernet. The network exchanges NTP (Network Time Protocol, Network Time Protocol) messages between the system clock board and each board to realize synchronization. refer to figure 1 ,Described as follows: [0003] 1. The system clock board distributes the system clock signal to each board in the system through the clock bus to ensure that each board uses the same reference clock; the system clock signal generally adopts...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L7/00G06F13/42
Inventor 邵贵阳袁华侯爱荭
Owner ZTE CORP
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