Full system type video demodulation circuit with high-precision multi-window automatic phase control mode

Abstract

The invention relates to an all-standard video demodulation circuit with a high precision multi-window automatic phase controlling model. One output end of an internal VCO oscillation module (11) is connected with the input end of a frequency divider in an analog single rough adjusting module (12), and another output end of the internal VCO oscillation module (11) is connected with the input end of a counter in a digital AFC adjusting module (13). A third output end of the internal VCO oscillation module (11) is connected with the input end of a multiplier in an analog single fine adjusting module (14). The output end of the multiplier in the analog single fine adjusting module (14), the output end of a logic element calculation in the digital AFC adjusting module (13), and the output endof the multiplier in the analog single rough adjusting module (12) are respectively connected with the input end of a PLL feedback module (15). In the AFC phase process, the demodulation circuit has the advantages of accuracy in locking, rapidity in reaction speed, high frequency in locking signal, convenience in transformation controlling and suitability for all TV formula using, which has no need to be adjusted peripherally.

Description

technical field [0001] The invention is a full-standard video demodulation integrated circuit with AFC (automatic phase control) with high precision, high response speed and multi-windows (three locking judgment windows). The part mainly related to digital AFC control belongs to the field of high-speed PLL (Phase Locked Loop). Background technique [0002] At present, in domestic and foreign integrated circuits, there are already many types of circuits that complete the AFC function, but the basic principle is to complete this function by comparing the signals of the reference frequency and then introducing negative feedback. However, most designs have the disadvantages of slow locking speed, single locking frequency and poor locking accuracy. This design fully considers the above shortcomings, adopts the ECL D flip-flop and Bi-CMOS design scheme with fast response ability, completes the design of the AFC module inside the circuit, and uses special logic theory to realize t...

AI Technical Summary

Problems solved by technology

However, most designs have the disadvantages of slow locking speed, single locking frequency, and poor locking accuracy

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