Dynamic reconfigurable instruction computer processor and implementing method

A technology for computer processors and reconfigurable instructions, which is applied to general-purpose stored-program computers and architectures with a single central processing unit, can solve problems such as slow computer processing speed and low efficiency of computer instruction sets, and achieve fast reprogrammability, The effect of improving resource utilization and improving processing speed

Inactive Publication Date: 2009-02-11
顾士平
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] (1) Solve the problem of low efficiency of existing computer instruction sets;
[0012] (2) Solve the problem of slow processing speed of existing computers;

Method used

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  • Dynamic reconfigurable instruction computer processor and implementing method
  • Dynamic reconfigurable instruction computer processor and implementing method
  • Dynamic reconfigurable instruction computer processor and implementing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0041] Functional instruction: One instruction completes a complete function, such as executing one instruction to complete TCP network processing.

[0042] Process-level instructions: A reconfigurable instruction to complete a process of the program is called a process-level instruction.

[0043] Thread-level instructions: Reconfigurable instructions complete a thread of the program, called thread-level instructions, and multiple thread instructions can be opened under one process-level instruction.

[0044]Reconfigurable instructions: Using dynamically reconfigurable integrated circuits, different configuration programs can configure dynamically reconfigurable integrated circuits into different instructions. Depending on the size of dynamically reconfigurable integrated circuits, dynamically reconfigurable integrated circuits can be The configuration is one reconfigurable instruction, multiple reconfigurable instructions, and the multiple reconfigurable instructions can be t...

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PUM

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Abstract

The invention provides a dynamically reconfigurable instruction computer processor and an implement method, and relates to a dynamically reconfigurable instruction computer processor composed of a dynamically reconfigurable integrated circuit. The dynamically reconfigurable integrated circuit is connected with a configuration circuit, a user data input/output circuit, a random access memory, a keyboard, a mouse and a display of the dynamically reconfigurable integrated circuit, and comprises a plurality of reconfigurable units; each reconfigurable unit is composed of a SRAM reconfigurable circuit with a configuration queue and a configuration clock; when the configuration clock of a corresponding configuration unit is allowed, the configuration unit is configured, namely a configuration instruction is updated; when the configuration clock is prohibited, no configuration data of the configuration unit is updated, so that the prior configuration is reserved, namely the prior reconfigurable instruction is reserved. The project can be widely applied to a PC computer, pervasive computing, an embedded processor, a communication processor and a network processor, particularly a processor of grid computing. The computer processor has broad prospects for application.

Description

1. Technical field [0001] The invention relates to a computer processor and an implementation method, in particular to a computer processor whose computer instructions can be changed dynamically. 2. Background technology [0002] The current computer instruction set is fixed. For example, the X86 processor, the X86 processor is a complex instruction set processor (CISC processor), and its processor instructions are more and more complex; another example is ARM, MIPS, PowerPC processor is a The reduced instruction set processor (RISC processor) has a small number of instructions and a simple addressing method, and the speed of the processor is mainly increased through multiple pipelines. [0003] With the continuous improvement of integrated circuit technology, the continuous reduction of the line width of integrated circuits, especially the continuous development of quantum devices, the number of gates of integrated circuits per unit area has continued to increase, providin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78
Inventor 顾士平华晓勤
Owner 顾士平
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