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Thin-film transistor array substrate

A technology of thin film transistors and array substrates, applied in the field of electronic equipment manufacturing, can solve problems such as disconnection of data lines, achieve the effect of solving short circuits or disconnection of data lines, and improving product quality

Active Publication Date: 2011-10-12
K TRONICS (SUZHOU) TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a thin film transistor array substrate, which can solve various problems such as short circuit or disconnection of data lines at the intersection of gate lines and data lines, and improve product quality.

Method used

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  • Thin-film transistor array substrate
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  • Thin-film transistor array substrate

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0015] Such as image 3 Shown is a schematic diagram of Embodiment 1 of the thin film transistor array substrate of the present invention. This embodiment includes: gate line 21, data line 22, data auxiliary line 24 and pixel electrode (not shown in the figure), wherein gate line 21 is positioned at the lower layer of insulating layer, data line 22 is positioned at the upper layer of insulating layer, data auxiliary line 24 is arranged on one side of the intersection of the data line 22 and the gate line 21, and the material of the data auxiliary line 24 is the same as that of the pixel electrode, and is formed on the same layer as the pixel electrode.

[0016] In this embodiment, there is a passivation layer between the pixel electrode and the data line 22. When the passivation layer is formed during the production process of the array substrate, the first via hole 25 and the second via hole 25 are left on the passivation layer. hole 26, these two via holes are respectively ...

Embodiment 2

[0019] Such as Figure 4 Shown is a schematic diagram of Embodiment 2 of the thin film transistor array substrate of the present invention. This embodiment includes: gate line 31, data line 32, data auxiliary line 34 and pixel electrode (not shown in the figure), wherein gate line 31 is positioned at the lower layer of insulating layer, data line 32 is positioned at the upper layer of insulating layer, data auxiliary line 34 is arranged on one side of the intersection of the data line 32 and the gate line 31, wherein the auxiliary data line 34 is composed of the first connection line 341, the second connection line 342 and the third connection line 343 connected in sequence; the first connection line 341 The material of the third connection line 343 is the same as that of the pixel electrode and formed on the same layer as the pixel electrode. The material of the second connection line 342 is the same as that of the data line 32 and formed on the same layer as the data line 32...

Embodiment 3

[0023] Such as Figure 5 Shown is a schematic diagram of Embodiment 3 of the thin film transistor array substrate of the present invention. This embodiment includes: gate line 41, data line 42 and data auxiliary line 44, wherein the gate line 41 is located in the lower layer of the insulating layer, the data line 42 is located in the upper layer of the insulating layer, and the data auxiliary line 44 is arranged on the data line 42 and the gate line 41 On one side of the intersection, both ends of the auxiliary data line 44 are connected to the data line 42 , and the material is the same as that of the data line 42 and formed on the same layer as the data line 42 .

[0024] When the data line 42 is formed in the production process of the array substrate, the auxiliary data line 44 is provided on one side of the intersection of the data line 42 and the gate line 41, and the data line 42 is disconnected or broken at the intersection of the data line 42 and the gate line 41. Dur...

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Abstract

The invention relates to a thin film transistor array substrate, comprising an upper layer and a lower layer which are respectively positioned at an insulating layer and a plurality of data cables and grid lines which are mutually and vertically crossed, a data complement cable is arranged at the one side of the cross part of the data cables and the grid lines, and the two ends of the data complement cable are connected with the data cables which are arranged at the two sides of the cross part. The thin film transistor array substrate connects the data cables with the adverse phenomena with the data complement cable by setting the data complement cables at one side of the cross part of the data cables and the grid lines, thereby cutting the data cables which are positioned at the cross part and repairing, solving the various adverse problems of short circuit of the cross part of the grid lines and the data cables or disconnection of the data cables, and the like, and improving the product quality.

Description

technical field [0001] The invention relates to a thin film transistor array substrate, in particular to a thin film transistor array substrate with data auxiliary lines, belonging to the field of electronic equipment manufacturing. Background technique [0002] The existing thin film transistor array substrate is provided with several data lines and gate lines perpendicular to each other, wherein the gate lines are located in the lower layer of the insulating layer, and the data lines are located in the upper layer of the insulating layer. Due to some foreign matter generated during the production process of the array substrate It will cause a short circuit between the gate line and the data line, and the hundreds of thousands of volts of static electricity that is easily generated around the gate line and the data line will also cause a short circuit between the gate line and the data line, and there will be a step difference at the intersection of the gate line and the dat...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L23/525G02F1/1362
CPCG02F1/136259H01L27/124
Inventor 崔承镇宋泳锡
Owner K TRONICS (SUZHOU) TECH CO LTD