Substrate for semiconductor package structure, semiconductor package structure and manufacturing method thereof
A packaging structure and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as reduced bonding reliability, partial peeling, and damage to the electrical connection between the chip 13 and external components
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[0032] The following will illustrate the content of the present invention through embodiments, which relate to the semiconductor package structure with better bonding and the manufacturing method thereof. However, the embodiments of the present invention are not intended to limit the present invention to be implemented in any specific environment, application or special method as described in the embodiments. Therefore, the descriptions about the embodiments are only for the purpose of explaining the present invention rather than limiting the present invention. It should be noted that in the following embodiments and accompanying drawings, elements irrelevant to the present invention have been omitted and not shown, and the dimensional proportional relationship between the elements shown in the accompanying drawings is for the purpose of illustrating the embodiments, not the actual production of the elements. time limit.
[0033] Please refer to figure 2 , which shows a sch...
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