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Content addressable memory

A technology for addressing memory and content, applied in the field of content-addressable memory

Inactive Publication Date: 2009-09-16
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] As mentioned above, conventional CAM array designs (for example, as image 3 and 4 shown in ) results in increased capacitance that degrades memory array performance

Method used

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Examples

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Embodiment Construction

[0027] Aspects of the invention are disclosed in the following description and associated drawings directed to specific embodiments of the invention. Alternative embodiments may be conceived without departing from the scope of the invention. Additionally, well-known elements of the invention will not be described in detail or will be omitted so as not to obscure the relevant details of the invention.

[0028] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. Likewise, the term "embodiments of the invention" does not require that all embodiments of the invention include the discussed feature, advantage or mode of operation.

[0029] Embodiments of the invention relate generally to content addressable memory (CAM) structures, and more particularly to methods and systems for providing content a...

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Abstract

A content addressable memory (CAM) is disclosed. The CAM has first and second CAM cells (710, 720, 730, 740) in which each adjacent CAM cell is rotated 180 relative to its neighbor, which provides a compact physical arrangement having overall matched CAM array cell and RAM array cell row heights. Further, an interleaved set scheme can be applied to the CAM cells to provide reduced routing of compare signals and reduced parasitic capacitance. The first and second CAM cells may be vertically stacked.

Description

technical field [0001] The present invention relates generally to memory architectures, and more particularly to methods and systems for content addressable memory (CAM). [0002] This application claims that the title of the application filed on November 17, 2006 is "METHOD AND APPARATUS OFCONTENT ADDRESSABLE MEMORY (CAM) STRUCTURE WITH INTERLEAVEDSET SCHEME" US Provisional Patent Application Serial No. 60 / 866,240. The entire contents of the aforementioned applications are incorporated herein by reference. Background technique [0003] A CAM may include conventional semiconductor memory (eg, static random access memory (SRAM)) and compare circuitry that enables search operations to be completed quickly (eg, in a single clock cycle). This capability allows for a hardware implementation of a search algorithm that provides greater speed than a software-implemented search. In the physical design of a CAM array structure, it is desirable to have a regular shape (eg, rectangul...

Claims

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Application Information

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IPC IPC(8): H01L21/8239H01L27/02H01L27/105G11C15/04H01L27/06H01L21/822
CPCG11C15/04H01L21/8221H01L27/1052G11C15/00G11C11/412H01L27/105H01L27/0207H01L21/8239H01L27/0688H10B99/00
Inventor 柴家明戴维·保罗·霍夫贾森·菲利浦·马茨洛夫迈克尔·泰坦·潘曼朱·拉脱娜·瓦尔马
Owner QUALCOMM INC
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