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Pre-emphasis circuit with configurable emphasis intensity

An emphasis circuit and pre-emphasis technology, which is applied in the fields of logic circuit coupling/interface, logic circuit connection/interface layout, electrical components, etc. using field effect transistors, can solve the problems of insufficient emphasis strength, high emphasis strength, waste of power consumption, etc. , to achieve the effect of low swing, reduce circuit power consumption, and reduce the consumption of voltage margin

Inactive Publication Date: 2012-06-13
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, in the design process of the transmitter circuit, it is usually necessary to pre-emphasize the high-frequency components of the signal to reduce the bit error rate of the received data due to high-frequency attenuation during transmission. However, the traditional high-speed pre-emphasis circuit has a complex structure. The power consumption is very large, and the emphasis intensity is constant and cannot be changed with different transmission media. Therefore, either the emphasis intensity is not enough, or the emphasis intensity is too large and the power consumption is wasted, which brings severe challenges to the design of the pre-emphasis circuit

Method used

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  • Pre-emphasis circuit with configurable emphasis intensity
  • Pre-emphasis circuit with configurable emphasis intensity
  • Pre-emphasis circuit with configurable emphasis intensity

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Embodiment Construction

[0018] The present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0019] Such as figure 2 , image 3 , Figure 4 with Figure 5 As shown, a pre-emphasis circuit with configurable emphasis intensity for high-speed I / O interfaces includes two parts: an adjustment circuit and an emphasis circuit. The core of the regulating circuit is a delay unit with variable delay, and the accent circuit includes a fast charge-discharge unit and a four-tube logic inverter. It is characterized in that: the adjusting circuit includes a first inverter INV1, a second inverter INV2, a delay unit with variable delay, a NAND gate and a NOR gate, and the output terminal Data_out passes through the inverter INV1 And the variable delay delay unit is connected to the NAND gate and the NOR gate NOR respectively, and the input terminal Data_in is connected to the NAND gate NAND, the NOR gate NOR and the second inverter INV2 respectively, and the...

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Abstract

The invention discloses a pre-emphasis circuit with configurable emphasis intensity for high-speed I / O interfaces. The pre-emphasis circuit comprises a regulation circuit and an emphasis circuit, wherein the core of the regulation circuit is a delay unit variable in time delay, and the emphasis circuit comprises a fast charge-discharge unit and a four-pipe logic inverter. The regulation circuit receives a full-width random data signal and a feedback low-swing-amplitude output data signal, and generates two paths of pulse control signals adjustable in pulse width according to different input selection signals. When different inputs jump, the emphasis circuit determines the time to fast charge or discharge an output node according to the pulse width of the two paths of control signals generated by the regulation circuit so as to realize pre-emphasis effects different in intensity, and simultaneously limits output swing amplitude through self-feedback so as to realize output signals highin speed and low in swing amplitude. The pre-emphasis circuit has the advantages of simple structure, configurable pre-emphasis intensity and capability of being used for single-end or double-end high-speed I / O interfaces.

Description

Technical field [0001] The present invention mainly relates to the design field of transmitters in high-speed I / O interfaces, and specifically refers to a pre-emphasis circuit with configurable weighting strength. Background technique [0002] In the high-speed I / O interface, especially the serial data interface such as USB, SATA, PCIE, because the data transmission rate is very high, the inter-code interference generated during the data transmission process is very serious. Therefore, in the design process of the transmitter circuit, it is usually necessary to pre-emphasize the high-frequency components of the signal to reduce the bit error rate of the received data due to the high-frequency attenuation during transmission. The traditional high-speed pre-emphasis circuit has a complicated structure. The power consumption is large, and the aggravation intensity remains the same, and cannot be changed with the transmission medium. Therefore, either the aggravation strength is not ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/0185H03K3/017
Inventor 徐炜遐王永文白创马卓陈怒兴李少青赵振宇陈吉华张民选方粮肖海鹏唐李红石大勇蒋仁杰
Owner NAT UNIV OF DEFENSE TECH
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