Device and method for realizing that FPGA can be used when being electrified and remote upgrade of FPGA

Abstract

The invention provides a device for realizing that an FPGA can be used when being electrified and the remote upgrade of the FPGA, comprising an FPGA chip and a buffer circuit connected with a CPU and the FPGA chip and used for ensuring that an electrical level of a lead foot of the FPGA chip connected with the buffer circuit is high all the time after being electrified, wherein a flash memory is embedded into the FPGA chip. The invention also provides a method for realizing that the FPGA can be used when being electrified and the remote upgrade of the FPGA, comprising the following steps after a logical file is remotely downloaded to the flash memory of a system: a loading module of the FPGA reads data steams of the logical file inside the flash memory and loads the FPGA; whether a CRC checkout error exists in the loading or not is detected, if the CRC checkout error exists in the loading, the loading module of the FPGA reloads the FPGA, if the CRC checkout error dose not exist in the loading , whether the logical file is successfully loaded or not is detected, if the logical file is successfully loaded, the upgrade is completed, and if the logical file is not successfully loaded, the FPGA continuously loads the FPGA. The invention can not only enable the FPGA to normally work when being electrified but also realizes the remote upgrade of the FPGA.

Description

technical field [0001] The present invention relates to an FPGA (Field Programmable Gate Array, Field Programmable Gate Array), in particular to a device and method for realizing FPGA power-on and remote upgrade. Background technique [0002] In modern embedded systems, more and more FPGA chips are used to complete large-scale logic functions. In addition to the remote upgrade function of FPGA, some systems also need to use the function of FPGA within a short time after power-on. The general FPGA loading methods are as follows: [0003] 1. Using the CPU to load, the method is to store the logic files of the FPGA and the software program in the FLASH memory (flash memory) of the device. After the system starts, the CPU executes the application program with the loading function to load the logic files into the FPGA. Although this loading method is convenient for remotely upgrading the FPGA, the FPGA can only be used after the application program has loaded the logic. [000...

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Although this solution can realize power-on and remo

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