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Pretreatment method for check matrix of bit reliability mapping

A check matrix and reliability technology, which is applied in the field of check matrix preprocessing for bit reliability mapping, can solve the problems of increasing the implementation complexity and increasing the system delay, and achieves the solution of reducing the implementation complexity and reducing the system delay. Effect

Inactive Publication Date: 2013-03-27
SHANGHAI JIAOTONG UNIV
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Problems solved by technology

The former maps the higher-degree bit nodes in the LDPC codeword to the bits with stronger anti-interference ability in the modulation symbol, and the latter maps the lower-degree bit nodes in the LDPC codeword to the modulation symbols with stronger anti-interference ability Although the two coding and modulation strategies can improve the BER performance of the wireless communication system to a certain extent, however, an interleaver is introduced in the implementation method, which increases the implementation complexity on the one hand, and increases the BER performance on the other hand. system delay

Method used

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  • Pretreatment method for check matrix of bit reliability mapping
  • Pretreatment method for check matrix of bit reliability mapping
  • Pretreatment method for check matrix of bit reliability mapping

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Embodiment 1

[0027] This embodiment adopts 16QAM modulation, Gray mapping, and the constellation diagram is as follows figure 2 As shown, the codeword parity check matrix is ​​as follows image 3 (1) shown.

[0028] Such as figure 1 As shown, this embodiment includes the following steps:

[0029] (1) Each modulation symbol has 4 bits, expressed as b0b1b2b3, and the relationship between the strength of the anti-interference ability is b0=b2>b1=b3, so the 4 bits can be divided into 2 strength levels;

[0030] (2) It is planned to adopt the strategy of Yan Li and William E.Ryan, that is, the bit nodes with higher degree in the LDPC codeword are mapped to the bits with stronger anti-interference ability in the modulation symbol, so they are arranged in descending order, and the arrangement is as follows image 3 as shown in (2);

[0031] (3) Divide the check matrix into 2 blocks, each with 6 columns;

[0032] (4) According to the functional relationship j'=j%C×L+[j / C](j=0,1,...,N;j'=0,1,...

Embodiment 2

[0036] Using 16QAM modulation, Gray mapping, the constellation diagram is as follows figure 2 As shown, the codeword degree distribution pair is shown in Table 1, the code length is 4096, the code rate is 0.5, the simulated channel is AWGN, and the strategy of Yan Li and William E.Ryan is used to map the bit nodes with higher degrees in the LDPC codeword to the bits with stronger anti-interference ability in the modulation symbol.

[0037] Table 1 Simulation code word degree distribution pair

[0038]

[0039] Such as Image 6 As shown, UEP_CM_Interleaver represents the traditional implementation method of the strategy proposed by Yan Li and William E.Ryan, UEP_CM_PreProcessor represents the preprocessing implementation method of the strategy proposed by Yan Li and William E.Ryan, and NO_UEP_CM represents the method without coding modulation. It can be seen that the performance of the preprocessing method described in this embodiment completely overlaps with that of the ...

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Abstract

The invention relates to a pretreatment method for a check matrix of bit reliability mapping used for an LDPC coding modulation system, belonging to the technical field of wireless communication. The method comprises the following steps: generating a check matrix; reranking according to the row of every bit node of the check matrix; dividing the check matrix into L blocks of sub-matrixes with equal column number; reranking the divided check matrix; and obtaining the check matrix which can be used for bit reliability mapping after pre-treatment. The invention removes an interleaver needed for bit reliability mapping in the LDPC coding modulation system and the coded array can map according to a natural order, thus reducing realization complexity, shortening system time delay greatly; the column exchange of check matrix has no influence on the code word performance, so the system performance is totally the same as traditional bit reliability mapping realization method.

Description

technical field [0001] The present invention relates to a method in the technical field of wireless communication, in particular to a check matrix preprocessing method for bit reliability mapping of an LDPC coded modulation system. Background technique [0002] In the field of wireless communication, Unequal Error Protection (UEP) has always been a research topic with high practical value, because, for applications such as digital TV and satellite broadcasting, some data are more important, or It is sensitive to noise and needs to be given stronger protection. Another part of the data is relatively minor, or less sensitive to noise, and only needs to provide weaker protection. In this case, it is a waste of resources to use equal protection for all data. However, using unequal error protection and focusing on those important information can effectively save resources without affecting system performance. [0003] In the channel coding process, the irregular low-density pari...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
Inventor 周洪源崔靖俞晖徐友云夏之晟
Owner SHANGHAI JIAOTONG UNIV
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