Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method and system for detecting defects in manufacture of integrated circuit

一种集成电路、缺陷的技术，应用在集成电路制造的自动缺陷检测领域，能够解决技术不充分等问题

Inactive Publication Date: 2010-01-06
SEMICON MFG INT (SHANGHAI) CORP
View PDF0 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, these techniques are often insufficient

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and system for detecting defects in manufacture of integrated circuit
  • Method and system for detecting defects in manufacture of integrated circuit
  • Method and system for detecting defects in manufacture of integrated circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] The present invention relates to integrated circuits and methods of fabricating semiconductor devices. More specifically, the present invention provides methods and systems for automated defect detection in integrated circuit fabrication. By way of example only, the invention has been applied to the detection of defects in the manufacture of integrated circuits using non-parametric statistical tools. However, it should be recognized that the present invention has broader applicability. For example, the invention can be applied to detecting defects in other manufacturing processes.

[0020] As mentioned above, for the manufacture of semiconductor wafers, it is important to detect manufacturing defects and identify possible sources of manufacturing defects. Previously, various conventional methods have been developed. Unfortunately, conventional methods are often insufficient.

[0021] For example, one of the methods for identifying the source of defects has been test...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a method and a system for detecting deflects in the manufacture of an integrated circuit. In one embodiment, the invention provides a method for detecting one or more sources possibly causing manufacturing deflects of the integrated circuit. The method comprises a step of providing a plurality of semiconductor substrates, a step of using a plurality of processing devices to process the plurality of semiconductor substrates in a plurality of processing steps, a step of providing a data base including the data related to the processing of the plurality of semiconductor substrates, a step of detecting a plurality of semiconductor chips after the processing of the plurality of semiconductor substrates, a step of detecting at least one defective feature related to the plurality of processed semiconductor substrates and a step of detecting a processing step collection, for example, the processing step collection is possibly related to the defective feature.

Description

technical field [0001] The present invention relates to integrated circuits and methods of fabricating semiconductor devices. More specifically, the present invention provides methods and systems for automated defect detection in integrated circuit fabrication. By way of example only, the invention has been applied to the detection of defects in the manufacture of integrated circuits using non-parametric statistical tools. However, it should be recognized that the present invention has broader applicability. For example, the invention can be applied to detecting defects in other manufacturing processes. Background technique [0002] Integrated circuits, or "ICs," have grown from a handful of interconnected devices fabricated on a monolith of silicon to millions of devices. Current ICs offer performance and complexity far beyond what was originally envisioned. To achieve improvements in complexity and circuit density (i.e., the number of devices that can be packed into a ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66G01R31/3177G01R31/28
CPCH01L22/12G05B23/02G05B2219/32191G05B19/41875G05B2219/32221G05B2219/11G05B2223/02Y02P90/02
Inventor 林光启张霞峰
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com