Multiple access for parallel turbo decoder

Abstract

A memory bank contains a plurality of memories, a first Butterfly network is configured to apply memory addresses to the memory bank, and a second Butterfly network is configured to pass data to or from the memory bank. A control signal is generated for the first and second Butterfly networks in accordance with a multiple access rule to enable parallel access to the memory bank, without memory access conflict, for one of a linear order and an interleaved order. The method and apparatus is particularly advantageous for use in turbo decoding.

Description

technical field [0001] The exemplary, non-limiting embodiments of the present invention relate generally to wireless communication systems, methods, devices, and computer program products, and more particularly, to techniques for decoding channel codes for forward error correction. Background technique [0002] During operation of a wireless communication system, when transmitting data, various channel codes for forward error correction need to be decoded. Typical channel codes, such as those used in 3G systems and WiMAX, are turbo codes, duo-turbo codes and low-density parity-check (LDPC) codes. [0003] A higher transmission data rate means a faster channel decoder at the receiver. A simple solution to this need is to increase the clock frequency of the receiver decoder to achieve the required data rate. However, using a high clock frequency requires a decoder (eg, a decoder implemented in an integrated circuit such as an ASIC) to consume more power, which is an obvious ...

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Problems solved by technology

[0009] Obviously, the drawback of this method is that the algorithm used to generate the mapping function is quite complex

Also, the algorithm does not ensure a simple network for routing data

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