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Method for gate oxide integrity (GOI) test of MOS transistor devices

A MOS transistor and gate oxide technology, applied in the field of MOS transistor device gate oxide integrity testing, can solve problems such as accurately reflecting the specific conditions of the gate oxide, device failure analysis, and inability to spend time.

Active Publication Date: 2010-06-09
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology

[0007] The present invention aims to solve the problem that in the prior art, when testing the gate oxide layer integrity (GOI) of MOS transistor devices and using parallel time-dependent dielectric breakdown (TDDB) testing, it is impossible to simultaneously and timely and accurately reflect the gate Specific conditions of the failure point on the extreme oxide layer, resulting in technical issues that require additional time or prevent further failure analysis of the device

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  • Method for gate oxide integrity (GOI) test of MOS transistor devices
  • Method for gate oxide integrity (GOI) test of MOS transistor devices
  • Method for gate oxide integrity (GOI) test of MOS transistor devices

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Embodiment Construction

[0023] In order to make the technical features of the present invention more comprehensible, specific embodiments are given below in conjunction with the accompanying drawings to further describe the present invention.

[0024] See figure 1 , which shows a schematic diagram of a system for testing the integrity of the gate oxide layer of a MOS transistor device provided by an embodiment of the present invention. The testing system includes:

[0025] A test power supply 110, a plurality of MOS transistor devices 120 to be tested are respectively connected to the test power supply 110, in this embodiment, the MOS transistor devices 120 to be tested are respectively connected by an electric programmable fuse (eFUSE electrically programmable fuse device) 130 The test power supply 110 is used to form a parallel gate oxide integrity (GOI) test system. The detection device 140 is configured to detect failure points on the MOS transistor device 120 .

[0026] See figure 2 , which ...

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Abstract

The invention discloses a method for a gate oxide integrity (GOI) test of MOS transistor devices, which comprises the following steps of: providing a test power supply; respectively connecting a plurality of MOS transistor devices to be detected to the test power supply; detecting the leakage current of the MOS transistor devices at the moment; and when the leakage current suddenly varies, starting a detecting device and detecting failure points on the MOS transistor devices. By utilizing the method, when the gate oxide reliability test is carried out on the MOS transistor devices, particularly a time-dependent dielectric breakdown (TDDB) test, the service life of the devices to be detected can be estimated, and the concrete condition of the failure points on gate oxide of the MOS transistor devices to be detected can be synchronously and accurately reflected in time, thereby carrying out further failure analysis on the devices.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for testing the integrity (GOI) of a gate oxide layer of a MOS transistor device. Background technique [0002] The gate oxide layer in the MOS transistor is formed by oxidation of the silicon substrate at high temperature. This layer of SiO 2 membrane is a 10 15 An insulating film with a high resistivity of about Ω·cm will generate F-N (Flowler-Nordheim) type tunneling current when the applied electric field is greater than 6mV / cm. [0003] With the continuous development of technology, the thickness of the gate oxide layer of integrated circuits is also reduced from 20-30nm to less than 1nm. The gate oxide layer continues to develop towards the film direction, but the power supply voltage should not be lowered, under a higher electric field strength. It is bound to make the performance of the gate oxide layer a prominent issue. Poor electrical r...

Claims

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Application Information

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IPC IPC(8): H01L21/66
Inventor 高超
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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