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Preparation method of DMOS (Domplementary Metal Oxide Semiconductor) with self-aligned channel in BCD (Bipolar CMOS DMOS) process

A self-alignment and channel technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as photoresist coating inhomogeneity

Active Publication Date: 2013-10-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0012] The technical problem to be solved by the present invention is the preparation method of the DMOS of the self-aligned channel in the BCD process, which can avoid the problem of photoresist coating inhomogeneity in the plane

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  • Preparation method of DMOS (Domplementary Metal Oxide Semiconductor) with self-aligned channel in BCD (Bipolar CMOS DMOS) process
  • Preparation method of DMOS (Domplementary Metal Oxide Semiconductor) with self-aligned channel in BCD (Bipolar CMOS DMOS) process
  • Preparation method of DMOS (Domplementary Metal Oxide Semiconductor) with self-aligned channel in BCD (Bipolar CMOS DMOS) process

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Embodiment Construction

[0028] The preparation method of the DMOS of self-aligned channel in the BCD process of the present invention comprises the following steps (see figure 2 ):

[0029] 1) After the deposition of polysilicon is completed, the position of the source-drain injection region of the low-voltage region is defined by using a photolithography process (coating photoresist, then using a photolithography mask for photolithography, and then developing to form a photoresist pattern) , so that the polysilicon located in the source and drain implantation regions after photolithography is exposed, while other positions are covered by photoresist (see Figure 3a );

[0030] 2) Etching is located at the position of the source-drain injection region (that is, Figure 3i The position of the third implantation region shown in ) to the surface of the silicon substrate, after which the remaining photoresist is removed (see Figure 3b );

[0031] 3) Deposit an oxide liner layer on the surface of th...

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Abstract

The invention discloses a preparation method of a DMOS (Domplementary Metal Oxide Semiconductor) with self-aligned channel in a BCD (Bipolar CMOS DMOS) process. The preparation method comprises the steps of: firstly, photoetching to completing the processing of a low-voltage area, then depositing an oxidation-precipitation layer, photoetching to completing the processing of a high-voltage area, and carrying out ion implantation to form a first implantation area and a second implantation area, therefore, the problem of nonuniform photoresist coating within a plane is solved.

Description

technical field [0001] The invention relates to a method for preparing DMOS of a self-aligned channel in a BCD process. Background technique [0002] The BCD (Bipolar CMOS) process is usually the preparation of three devices integrating high-voltage devices, low-voltage devices and bipolar transistors. In the current BCD process, for the production process of the self-aligned channel SAC (selfalignment channel) DMOS (letter D-shaped MOS transistor), the high-voltage device is implanted first, and the low-voltage device is implanted afterwards. Its production process is (see Figure 1): [0003] 1) After the polysilicon deposition is completed, the position of the first injection region of the high-voltage region (high-voltage device region) is defined by a photolithography process (see Figure 1a , the STI region in the figure is a shallow trench isolation region); [0004] 2) Etching the polysilicon at the position of the first implantation region to the surface of the sil...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8234H01L21/316
Inventor 陈福成
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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