Phase frequency detector and charge pump circuit for phase locked loop

Abstract

The invention provides a phase frequency detector and charge pump circuit for a phase locked loop. The prior art has the defects of poor linearity and noise performance, so when a first series circuit is connected with the output end of a current pump, an upstream biasing circuit is used as a biasing circuit of an upstream current source; and when a second series circuit is connected with the output end of the current pump, a downstream biasing current source is used as a biasing circuit of a downstream current source. By adding the two fixed biasing currents and selecting proper biasing current according to the output voltage of the charge pump, phase difference of two input ends of the phase frequency detector deviates from zero after the PLL loop is locked, so that the aim of enhancing the linearity of the phase frequency detector and the charge pump and improving the noise performance of a fractional-N phase locked loop can be achieved.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a circuit for improving the linearity and noise performance of a frequency and phase detector and a charge pump in a fractional frequency division phase-locked loop. Background technique [0002] A typical delta-sigma modulator fractional frequency synthesizer such as figure 2 As shown, including delta-sigma modulator and fractional frequency phase-locked loop, fractional frequency phase-locked loop (Frac-N PLL) is mainly composed of phase frequency detector (PFD), charge pump (CP), loop filter (LPF), voltage controlled oscillator (VCO) and frequency divider. Due to the excellent characteristics of fractional frequency PLL, such as high frequency resolution and instantaneous locking speed, it is widely used in radio frequency (RF) circuits. [0003] Traditional phase frequency detector (PFD) 1 and charge pump (CP) 2 such as figure 1 As shown, it can provide a wide frequ...

AI Technical Summary

Problems solved by technology

[0006] In order to solve the problem of poor linearity and noise performance in the prior art, the present invention provides a frequency detector and a charge pump circuit for a phase-locked loop. Set the current so that after the PLL loop is locked, the phase difference between the two input terminals of the PFD deviates from zero, so as to achieve the purpose of enhancing linearity and improving noise performance

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