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High-voltage ESD (Electronic Static Discharge) protection circuit

A technology of ESD protection and circuits, applied in emergency protection circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, circuit devices, etc., can solve problems such as capacitance difficulties

Inactive Publication Date: 2011-01-26
SHANGHAI SANDHILL MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, it is difficult to prepare capacitors with high breakdown voltage and high capacitance density to meet the high voltage process. Therefore, these two ESD protection circuits cannot be used when the input voltage is high (voltage exceeds 7V).

Method used

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  • High-voltage ESD (Electronic Static Discharge) protection circuit
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  • High-voltage ESD (Electronic Static Discharge) protection circuit

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Embodiment Construction

[0014] Further description will be made below in conjunction with embodiments of the present invention and accompanying drawings.

[0015] refer to image 3 , Figure 4 The two high-voltage ESD protection circuits shown include power port 3, NMOS discharge tube 1, ESD detection resistor R3 and pull-down resistor R1, the drain of NMOS discharge tube 1 is connected to power port 3, ESD detection resistor R3, and an NMOS pull-up The drain and the source of the tube 2 are respectively connected to the drain and the gate of the NMOS discharge tube 1, and the gate of the NMOS pull-up tube 2 is connected to the pull-down resistor R1 and grounded.

[0016] The connection between the power supply port 3, the drain of the NMOS discharge tube 1, the ESD detection resistor R3, and the drain of the NMOS pull-up tube 2 constitutes a first node 10, and the connection between the gate of the NMOS pull-up tube 2 and the pull-down resistor R1 connected thereto The connection line constitutes ...

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PUM

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Abstract

The invention relates to a high-voltage ESD (Electronic Static Discharge) protection circuit which comprises a power supply port, an NMOS (N-channel Metal Oxide Semiconductor) discharge tube, an ESD detection resistor and a pull-down resistor, and a drain of the NMOS discharge tube is connected with the power supply port and the ESD detection resistor. The high-voltage ESD protection circuit is characterized in that the drain and a grid of the NMOS discharge tube are respectively connected with a drain and a source of an NMOS pull-up tube, and a grid of the NMOS pull-up tube is earthed after being connected with the pull-down resistor. Compared with the traditional ESD protection circuit, the NMOS pull-up tube is introduced as the pull-up tube in place of a detection capacitor Ca, parasitic capacitors Cgd and Cgs of the NMOS pull-up tube per se are used for conducting the NMOS discharge tube, and the purpose of ESD protection is realized.

Description

[technical field] [0001] The invention relates to integrated circuit design, in particular, it is related to a high-voltage ESD protection circuit using triggered discharge in the integrated circuit. [Background technique] [0002] There are many types of electrostatic discharge (ESD) protection circuits for integrated circuits, one of which is the ESD trigger discharge protection circuit, that is, when an ESD detection circuit detects an ESD impact, the circuit releases a signal to open the discharge tube, the discharge tube discharge the ESD current. [0003] figure 1 It is a commonly used ESD protection circuit. In the figure, NMOS1 is a discharge tube, R1 is a pull-down resistor, R2 is an ESD detection resistor, Cgd (between the gate and drain of NMOS1) and Cgs (between the gate and source of NMOS1) are parasitic capacitances, Ca is the ESD detection capacitor, which can be omitted in the low-voltage process. [0004] When the ESD current impacts the integrated circui...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02H9/00
Inventor 肖国庆李茂登
Owner SHANGHAI SANDHILL MICROELECTRONICS
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