Providing hardware support for shared virtual memory between local and remote physical memory

Abstract

In one embodiment, the present invention includes a memory management unit (MMU) having entries to store virtual address to physical address translations, where each entry includes a location indicator to indicate whether a memory location for the corresponding entry is present in a local or remote memory. In this way, a common virtual memory space can be shared between the two memories, which may be separated by one or more non-coherent links. Other embodiments are described and claimed.

Description

Background technique [0001] With the development of processor-based systems, via, for example, PCI Express-based TM Specification Basic Specification Version 2.0 (released on January 17, 2007) (hereinafter referred to as PCIe TM Specification) or a link of another such protocol Peripheral Component Interconnect Express (PCIe TM ) interconnects, etc. The availability of high-speed peripheral interconnects connected to the system's programmable accelerators allows system integrators to pack more computing power into the system. However, it is important to ensure that the application can transparently take advantage of the additional computing power without requiring significant changes to the application to manually divide the computation between the main processor (such as a multi-core central processing unit (CPU)) and the accelerator and to manage the movement of data to and from the accelerator. There are problems. Traditionally, only the main system memory managed by the...

AI Technical Summary

Problems solved by technology

While the OS manages the physical memory available on the motherboard (system memory), it does not manage or allocate memory that is local to and available to the accelerator

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