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Underlying hardware mapping method for integrated circuit as well as time sequence constraint method and device for data control flow

An integrated circuit and data control technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as time differences in realization

Inactive Publication Date: 2012-10-24
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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  • Application Information

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Problems solved by technology

That is to say, the realization of the first part is affected by the technical personnel's own experience and knowledge level, and for different technical personnel, there are large differences in the realization time

Method used

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  • Underlying hardware mapping method for integrated circuit as well as time sequence constraint method and device for data control flow
  • Underlying hardware mapping method for integrated circuit as well as time sequence constraint method and device for data control flow
  • Underlying hardware mapping method for integrated circuit as well as time sequence constraint method and device for data control flow

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Embodiment Construction

[0063] The present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings.

[0064] Looking back at the development of integrated circuit design methodology, we can see that: when the integrated circuit manufacturing process entered the era of 1um, the design method with the gate array as the basic unit appeared; when the integrated circuit manufacturing process entered the era of 0.5um, there appeared the The standard unit is the design method of the basic unit; when the integrated circuit manufacturing process enters the era of 0.18um, the design method with the IP core as the basic unit appears. It can be seen from this that: on the one hand, the design methodology of integrated circuits develops with the development of integrated circuit manufacturing processes; on the other hand, the unit granularity of basic units (gates, standard cells, IP cores) used in integrated circuit design methodology keep gr...

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Abstract

The invention discloses an underlying hardware mapping method and device for an integrated circuit, wherein a computer language program describing the algorithm of the integrated circuit is analyzed, mapped into a data control flow graph and further converted into an operator time-space diagram; and the time sequence constraint is carried out on the data control flow graph, then the clustering compression is carried out on the operator time-space diagram according to a time sequence label, and the logical description on the underlying hardware circuit of the integrated circuit is further generated, thereby creating a mapping tool from computer language to the underlying hardware circuit of the integrated circuit, realizing the process of generating underlying hardware of the integrated circuit from C or MATLAB (matrix laboratory) and other languages in a standardized manner conveniently and fast. The invention also discloses time sequence constraint method and device for a data control flow graph, wherein the circuit obtained according to the constraint method is ensured to have regularity by carrying out the time sequence constraint on the data control flow; and furthermore, the method is applicable to time sequence design and verification of a digital circuit and can be favorable for a hardware engineer to carry out hardware design to a greater extent.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to an integrated circuit lower layer hardware mapping method, a data control flow timing constraint method and a device. Background technique [0002] In the field of integrated circuits, the design speed of integrated circuits usually lags behind the development speed of integrated circuit manufacturing processes. Especially after the manufacturing process of integrated circuits has entered the nanometer level, the design speed of integrated circuits has lagged far behind the development speed of integrated circuit manufacturing processes. Therefore, for the field of integrated circuit design, improving the design speed is one of the most urgent problems at present. Such as figure 1 As shown, in the prior art, the design of an integrated circuit usually includes two parts: the first part is from the algorithm description based on C language or MATLAB language to the descr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 王新安胡子一安辉耀谢峥王腾张兴周生明赵秋奇马芝孙亚春
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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