Method for testing bus interface on PCIE (Peripheral Component Interface Express) slot of host and read-write test method thereof

Abstract

The invention discloses a method for testing a bus interface on a PCIE (Peripheral Component Interface Express) slot of a host, which is characterized in that a PCIE test tool is used for testing the bus interface on the PCIE slot of the host. The test method comprises the following steps of: setting the initiation of the PCIE test tool as a master equipment mode, and setting other equipment on a bus of the PCIE slot of the host as slave equipment; sequentially scanning the slave equipment on the bus of the PCIE slot of the host through the PCIE test tool; judging whether the slave equipment correctively responding to the visit of the PCIE test tool is present; if yes, ending the test; and if no slave equipment on the bus correctively responds to the visit of the PCIE test tool, reporting an error and quitting the test. The test method can enhance the accuracy, the stability and the reliability of the bus interface on the PCIE slot of the tested host remarkably.

Description

technical field [0001] The invention relates to a method for testing a bus interface, in particular to a method for testing a bus interface on a host computer PCIE slot. Background technique [0002] Peripheral Component Interconnect (PCI for short) is a bus standard for connecting computer motherboards and interface devices, formulated and published by Intel Corporation. It can be connected with the address bus, data bus and most of the control bus pins of the central processing unit (Central Processing Unit, referred to as CPU), but the signal must be transferred through the control chip. The PCI standard stipulates the physical size of the bus (including line width), power characteristics, bus timing and protocol, etc., which has the advantages of simple bus structure, low cost, and simple design. [0003] Peripheral Device Component Interconnect Express (PCI Express, referred to as PCIE), is the latest bus and interface standard, and is a higher development of PCI. It f...

AI Technical Summary

Problems solved by technology

When testing these bus interfaces on the PCIE slot of the host computer, the existing test method is, for example, scanning the existing slave address (Slave Address) on the SMBus bus through a test program. This method can only perform read operations, and cannot Write operation, so it cannot realize the test of the SMBus interface in the true sense

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