Successive approximation analog-digital converter and method thereof

An analog-to-digital, successive approximation technology, applied in analog-to-digital conversion, code conversion, instruments, etc., can solve problems such as the ratio of series capacitors is not an integer multiple, and the problem of capacitor matching is reduced.

Active Publication Date: 2011-05-11
HOLTEK SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] Based on the shortcomings of the above-mentioned traditional SAR ADC, it is necessary to use a more effective capacitor arrangement to solve the probl

Method used

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  • Successive approximation analog-digital converter and method thereof
  • Successive approximation analog-digital converter and method thereof
  • Successive approximation analog-digital converter and method thereof

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Embodiment Construction

[0031] Please refer to figure 2, is a schematic circuit diagram showing a successive approximation analog-to-digital converter according to a first preferred embodiment of the present invention. The upper half of the figure is the LSB capacitor group, the lower half is the MSB group, the MSB capacitor group has the most significant bit, the LSB capacitor group has the least significant bit, the least significant bit capacitor group contains m bits, and the maximum effective The bit capacitor group includes n-m bits, n is the number of digits of the successive approximation analog-to-digital converter, each of which corresponds to at least one capacitor and at least one switch, and the first conversion refers to n-m of the most effective bit capacitor group Bit conversion, the second conversion is the conversion of m bits of the least significant bit capacitor bank, the successive approximation switch controller is coupled to the first output terminal of the comparator, and ac...

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Abstract

The invention discloses a successive approximation analog-digital converter, which comprises a comparator, a maximum significant digit analog-digital converter and a minimum significant digit analog-digital converter, wherein the comparator is provided with an inverting input end, a non-inverting input end and an output end and is used for outputting a comparison result; the maximum significant digit analog-digital converter is coupled at the non-inverting input end; and the minimum significant digit analog-digital converter is coupled at the inverting input end.

Description

technical field [0001] The present invention relates to a successive approximation analog to digital converter (successive approximation analog to digital converter, SAR ADC), in particular to a capacitor divided into two groups of maximum significant bit (MSB) and least significant bit (LSB), respectively coupled to a comparator The successive approximation analog-to-digital converter of the positive and negative terminals is suitable for high-resolution SARADC. Background technique [0002] figure 1 is a circuit schematic showing a conventional successive approximation analog-to-digital converter. exist figure 1 Among them, C*32 / 31 and all the capacitors on the right form the LSB capacitor bank, and all the capacitors on the left side of C*32 / 31 form the MSB capacitor bank. This is a 10-bit SAR ADC, and the MSB capacitor bank has 5 bits, and the LSB capacitor bank also has 5 bits. VIN is an analog input signal, VREF and VREF / 2 are reference voltages, cmpo is the output...

Claims

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Application Information

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IPC IPC(8): H03M1/38
Inventor 许博钦
Owner HOLTEK SEMICON
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