95results about How to "Prevent Waveform Distortion" patented technology

A liquid jet apparatus includes a plurality of nozzles provided to a liquid jet head, an actuator provided corresponding to each of the nozzles, and drive unit for applying a drive pulse to the actuator, wherein the drive unit includes drive waveform signal generation unit that generates one or more of drive waveform signals each providing basis of the drive pulse to the actuator, one or more of transistor pairs provided as many as the number of the actuators in order for power-amplifying the one or more of drive waveform signals generated by the drive waveform signal generation unit, and each having two transistors forming a pair and connected to each other in a push-pull manner, and one or more of low-pass filters provided as many as the number of the actuators and each disposed between a connection point of the transistor pair and the actuator.

In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, this invention enables preventing waveform distortion near the peak output power level by allowing sufficient idle currents to flow through the transistors for amplification, while enhancing the power efficiency in a low output power region. The power amplifier includes a detection circuit comprising a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage conversion means which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detection and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.

The invention relates to a novel monopole inverting circuit capable of boosting voltage, and topology is shown in an attached figure. Besides a three-phase switch bridge (B) of the conventional voltage type inverter, the circuit is additionally provided with a tightly coupled inductor consisting of inductors (L1, L2), a capacitor (C), an interdiction diode (D) and a switch tube (T) for an energy feedback passage (can be removed if no energy is needed to feedback). The voltage boosting control mode of the circuit to an inverter direct current bus uses the state of the through zero vector of the upper and lower switch tubes emitted by the three-phase inverter bridge during zero vector to adjust the action time so as to realize the controllable promotion of direct current bus voltage of the input side of the inverter. The inductors (L1 and L2) are tightly coupled, when the inductors are in a state of through zero vector, the inverter is directly communicated, and a DC voltage source (Vs) charges a couple inductor (L1); and when the inductors are in a state of non-through zero vector, the inductors release energy to supply power to the direct current bus of the inverter (B); the voltage of the direct current bus of the inverter is obtained by lapping the voltage of the inductor (L2) and the voltage of the capacitor (C) so as to enable the voltage of the direct current bus of the inverter to be improved, so that the inverter voltage is boosted.

The present invention provides a modular parallel three-level Vienna rectifier, a control system and a method. The present disclosure effectively suppresses the zero-sequence circulation of a system,and the waveform quality of the input current is improved remarkably, so the invention is suitable for the working conditions that the current distribution proportions of two three-level Vienna rectifier modules are equal and unequal and the input filter inductances are equal and unequal. The elimination of the zero-point distortion of the input current fully considers the influence of the filterinductor on the relative position of the voltage vector and the current vector. The effect of the input current zero-crossing distortion is better than that in a conventional method, and the total harmonic distortion rate of the input current is reduced.

The invention relates to a standard Z source three-level T-shaped inverter and an SVPWM method thereof. A topology has boost features identical to boost features of a standard Z source network three-level NPC inverter, however, few switching elements are utilized, and efficiency is high. Compared with a three-level T-shaped inverter, functions of boost and voltage reduction of the topology can be achieved, direct connection of an upper bridge arm and a lower bridge arm is allowed, reliability is improved remarkably, dead time is eliminated, and waveform distortion is prevented. Compared with a Z source three-level diode clamped inverter, current at an input end is continuous, ripple waves are small, and the input end does not need to be connected with a large-capacitance array set in parallel. Compared with a standard Z source two-level inverter, output voltage has neutral point electric potentials, therefore, high frequency harmonic waves are small, a required filter is small, a switching frequency can be reduced, and switching loss is less. The SVPWM method is adopted to control the inverter, so that switching frequencies are decreased, switching loss is reduced, and harmonic contents of the output voltage are reduced.

The invention discloses a dual-Sepic buck-boost output parallel combined inverter, which comprises two buck-boost Speic DC / DC circuits that are connected in parallel at the output side, and which can realize the buck-boost single-phase inversion and expand the buck-boost single-phase inversion in a three-phase system to realize the three-phase inversion output. The inverter has the basic function of realizing buck-boost inversion; when the direct-current voltage at the input side is lower or the change range is larger, the dual-Sepic buck-boost output parallel combined inverter still can realize the inversion function; two high-frequency switching tubes adopt a non-complementary work manner and do not work simultaneously, therefore, the bridge through problem is prevented; the circuit parameter designing principle can be designed according to the mature direct-current Sepic converter designing principle; the inductive current works under the continuous state and reduces the influence of the EMI (Electro-Magnetic interference). The invention is mainly applied to the field of renewable energy source or new energy source generation with lower direct-current voltage, faster change or larger fluctuation range, such as photovoltaic power generation, a small Wind turbine generator system, fuel cell generation, and the like.

In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, this invention enables preventing waveform distortion near the peak output power level by allowing sufficient idle currents to flow through the transistors for amplification, while enhancing the power efficiency in a low output power region. The power amplifier includes a detection circuit comprising a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage conversion means which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detection and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.

A liquid jet apparatus includes a plurality of nozzles provided to a liquid jet head, an actuator provided corresponding to each of the nozzles, and drive unit for applying a drive pulse to the actuator, wherein the drive unit includes drive waveform signal generation unit that generates one or more of drive waveform signals each providing basis of the drive pulse to the actuator, one or more of transistor pairs provided as many as the number of the actuators in order for power-amplifying the one or more of drive waveform signals generated by the drive waveform signal generation unit, and each having two transistors forming a pair and connected to each other in a push-pull manner, and one or more of low-pass filters provided as many as the number of the actuators and each disposed between a connection point of the transistor pair and the actuator.

A magnetically coupled resonance type wireless power transmission controllable-inductance tuning unit comprises two controllable reactors reversely connected in parallel. Each controllable reactor comprises a current controller and a reactor, the reactor comprises a direct current winding and an alternating current winding which share a magnetic circuit, and the direct current winding is connected with output of the current controller and is controlled through phase difference between voltage and current in a resonance circuit. The magnetically coupled resonance type wireless power transmission controllable-inductance tuning unit is used for compensating detuning in magnetically coupled resonance type wireless power transmission, or allowing the resonance circuit to re-resonate under a new frequency. The input current of the direct current windings of the reactors is controlled through the phase difference between voltage and current in the resonance circuit, the inductance of the alternating current windings is changed, the alternating current windings are connected to the resonance circuit, and the variable inductance is used to compensate detuning of the resonance circuit caused by parameter change.

In a receiver circuit, a binary signal is generated based on a signal level of a received signal that has been received via a transmission line from a driver of a transmitter circuit. Then, a first stable state and a second stable state are detected based on a reference signal whose signal level changes in accordance with the received signal. In the first stable state, the received signal is stable at a first signal level. In the second stable state, the received signal is stable at a second signal level. When the first stable state is detected and the received signal is changed from the first signal level into the second signal level, the generated binary signal is retained at a signal level corresponding to the second signal level, until the second stable state is detected.

This invention provides a micro-silicon microphone and its preparation method, in which, said microphone includes a monocrystal silicon film and polysilicon film as the capacitor pole plates, the polysilicon film is a movable pole plate, several release holes are set on the monosilicon film and rib reinforcement structures are formed on the polysilicon film, the rib reinforcement structure is corresponding to the release hole on the monocrystal silicon film and inlayed in the release holes. The preparation method utilizes ICP technology to carry out deep bar etching to either get the release holes or realize polysilicon films with the rib reinforcement structure.

A driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided. A driving method of a semiconductor device including a transistor and a capacitor electrically connected to a gate of the transistor includes a first period where voltage corresponding to threshold voltage of the transistor is held in the capacitor, a second period where a total voltage of video signal voltage and threshold voltage is held in the capacitor holding the threshold voltage, and a third period where charge held in the capacitor in accordance with the total voltage of the video signal voltage and the threshold voltage in the second period is discharged through the transistor.

Provided is a display device including a level shifter generating an output clock swinging between a first voltage and a third voltage during a display period and swinging between a second voltage and the third voltage during a touch sensing period. Waveform distortion of a no-load alternating current (AC) signal may be prevented without eliminating a stabilizing capacitor of the level shifter, and thus, sensing sensitivity may be increased by reducing noise of a touch sensor signal.

In a semiconductor device comprising a semiconductor optical amplifier, in order to allow a photodetector to be integrated without causing power loss at a low cost, the semiconductor device comprises a semiconductor substrate, a semiconductor optical waveguide, at least partly capable of functioning as a semiconductor optical amplifier, to guide signal light, and a photodetector provided in a region other than a region where the semiconductor optical waveguide is provided, wherein the semiconductor optical waveguide and the photodetector are integrated on the semiconductor substrate.

A control circuit is developed to detect a flyback voltage of a transformer of a power converter. The control circuit comprises a switch, a detection circuit and a switching circuit. The switch is coupled to the transformer for switching the transformer. The detection circuit coupled the transformer to detect the flyback voltage for generating a first signal. The switching circuit generates a control signal to control the switch and regulate the output of the power converter in response to the first signal. Because the pulse width of the flyback voltage is short at light load, the detection circuit is designed to produce a bias signal to help the flyback voltage detection. The bias signal is increased in response to the decrease of the discharge time of the transformer. Besides, the switching circuit generates a blanking signal in response to the control signal. The blanking signal ensures a minimum pulse width of the flyback voltage.

The invention discloses a shifting register which comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a voltage division component, wherein a grid of the fifth transistor is electrically connected with a drain of the third transistor through the voltage division component. The embodiment of the invention at least achieves one of the following effects: the shifting register can be adopted to prevent output signal's wave form distortion caused by leak current so as to raise display quality of a display device, minimize the number of photomasks and reduce the influence of process capability on yield, and then capacity is raised and cost is decreased.

The invention relates to a Z-source three-level T-type inverter and a neutral-point balance control method thereof. A topology has an identical step-up characteristic with a Z-source network three-level neutral-point clamped (NPC) inverter, but uses comparatively fewer switching devices and has higher efficiency. Compared with a three-level T-type inverter, the topology is capable of realizing a step-up / step-down function and allows direction connection of upper and lower bridge arms so that the reliability is improved obviously, dead time is eliminated and waveform distortion is prevented. Compared with a Z-source two-level inverter, an output voltage has a neutral-point level so that high-frequency harmonic waves are low and a needed filter is smaller. Because three levels are closer to sine waves than two levels, switching frequency can be reduced and switching loss is lower. An SVPWM control strategy is adopted and a three-level SVPWM is converted into a two-level SVPWM and then neutral-point balance and step-up are realized on the basis of the two-level SVPWM. The method is capable of simply eliminating neutral-point balance and direct-connection coupling.

A signal processing circuit includes an interpolation filter for outputting an interpolation value of signal levels at positions of ¼ phase and ¾ phase between two original pixels of the input digital image adjacent in the predetermine direction; a phase shift circuit for outputting signal value of each of the two original pixels by shifting the phases of the signals of the two original pixels in the predetermined direction to ¼ phase and ¾ phase, respectively, between the two original pixels; a edge detection circuit for detecting a edge portion of the image from a signal level change of a plurality of pixels including the two original pixels of the input digital image in the predetermined direction; and a first signal selection circuit for outputting the output of the phase shift circuit when the edge is detected, and outputting the output of the interpolation filter when no edge is detected, based on the result of detection by the edge detection circuit.

In spite of an increase in the size of a liquid crystal display panel, it is possible to prevent the defective connection of a flexible wiring board to a transparent substrate of the liquid crystal display panel. A liquid crystal display device includes a pair of transparent substrates arranged to oppose each other across a liquid crystal, for which they are utilized to form a chamber, a plurality of pixels formed along a spreading direction of the liquid crystal, driving circuits for supplying video signals to the pixels, and a flexible wiring board for supplying signals to the input sides of the driving circuits from a substrate on which a control circuit is mounted, the flexible wiring board being divided into a plurality of portions.

A class-D amplifier includes a differential integrator that integrates a difference between an input signal and a feedback signal to output an integration value signal, a pulse width modulation circuit that outputs a digital signal having a pulse width corresponding to a level of the integration value signal, an output buffer that drives a load based on the digital signal, a feedback section thatfeeds an output signal of the output buffer into the differential integrator as the feedback signal, a clamp section that performs a clamping of limiting the level of the integration value signal within a specified level range, an attenuation section that attenuates the level of the input signal to be input to the differential integrator in response to an attenuation command, and an attenuation control section that outputs the attenuation command to the attenuation section in response to the clamping performed by the clamp section.

The invention discloses a high-power wind power generating system which comprises a wind power generator, a zero-point switching circuit, an intelligent control system, a wind power generating transformer and a power utilization network. The wind power generating transformer is arranged in the zero-point switching circuit and used for voltage transformation of power generated from the wind power generator and then connecting the power to the power utilization network. The zero-point switching circuit is arranged between the wind power generator and the power utilization network. The intelligent control system is used for controlling the wind power generator to generate power according to control parameters. The wind power generator comprises an intelligent fuzzy controller, a PID(proportion, integration and differentiation) hydraulic valve, an air valve, a wind power sensor and a rotational speed sensor, the wind power sensor is connected with the intelligent fuzzy controller, the rotational speed sensor detects rotational speed of a generator rotor and connected with the intelligent fuzzy controller, and the intelligent fuzzy controller controls the PID hydraulic valve to regulate the air valve by analyzing data transmitted from the wind power sensor and the rotational speed sensor. The high-power wind power generating system can be connected to a power grid as a thermal power generation system, and is adaptable to severe environments.

The invention discloses a partial discharge signal de-noising method based on a wavelet and a high-order PDE, comprising the following steps: S1, inputting a collected partial discharge noise signal; S2, selecting an appropriate mother wavelet through a correlation coefficient method, selecting an appropriate decomposition layer number N, and performing wavelet transformation and decomposition on the collected noise signal; S3, performing high-order PDE processing on low-frequency sub-components in the Nth layer; S4, calculating the signal-to-noise ratio SNR of a de-noised signal, repeating S3 and S4, and stopping iteration until the SNR value output at any iteration is smaller than the SNR value output at the previous iteration; S5, performing threshold processing on high-frequency sub-components in the first to Nth layers; and S6, performing wavelet reconstruction on the processed low-frequency sub-components and high-frequency sub-components to get a de-noised partial discharge signal. The method is simple in calculation, runs fast, can better remove noise, achieves low distortion, and can retain the signal edge properly.

This invention relates to a control circuit of a power converter for detecting the back-relaxation voltage of a transformer of a power converter including a switch, a detecting circuit and a switch circuit, in which, a switch coupling transformer is used in switching transformers and the coupling transformer of the detection circuit is used in detecting the back-relaxation voltage to generate a first signal, a switch circuit generates a control signal based on the first signal to control the switch and regulate the output of the power converter, since the pulse width of the back-relaxation voltage is shortened when the power converter is at light load, the detection circuit generates a bias signal to help detecting the back-relaxation voltage, the bias signal is in inverse ratio with the discharge time of the transformer, in addition to that, the switch circuit generates a blanking signal based on the control signal to guarantee the minimum pulse width of the voltage.

The invention provides a prestack channel set optimization method based on wavelet packet decomposition. The method comprises the steps that firstly self-adaptive decomposition is carried out on earthquake channel sets through wavelet packets, a decomposition coefficient is divided into low-frequency signals, medium-frequency signals and high-frequency signals, noise detection and removal are carried out on the high-frequency signals, event alignment is respectively carried out on the low-frequency signals and the medium-frequency signals, and finally earthquake channel set construction is carried out on the low-frequency signals and the medium-frequency signals obtained after alignment. According to the method, self-adaptive decomposition is carried out on earthquake signals through the wavelet packets, the decomposition is free of redundancy and free of omissions, the event characteristics are different in all frequency bands, and event similarity calculation is carried out on each frequency band more accurately. According to the method, two types of messages of the attraction degree and the attribute degree are defined to carry out similarity spreading between the channel sets, reference channels and similar channels are automatically selected, manual intervention is not needed, and high reliability is achieved. According to the method, the movement amount of time window center points is used as the movement amount of seed points, the movement amount of other points is obtained through the interpolation of the movement amount of the seed points, and wave form distortion is avoided.

A frequency-variable PWM motor drive circuit includes a drive IC member, a Hall IC member, a PWM converter circuit and a compensation unit. The drive IC member electrically connects with the Hall IC member, the drive IC member further includes a pin electrically connected with the compensation unit and the PWM converter circuit. The PWM converter circuit has a PWM input pin to receive a PWM signal, and converts it into a voltage signal. The compensation unit connects between the pin of the drive IC member and the PWM converter circuit. In operation, the compensation unit can improve a waveform of the voltage signal supplied from the PWM converter circuit, and then output it to the pin of the drive IC member. Consequently, the drive IC member can be steadily operated at predetermined motor speeds under various frequencies of the PWM signals.

The invention discloses a method for imaging an optimized angle of a well earthquake reflected wave, comprising the following steps: carrying out VSP-CDP conversion of each concentrical depth point according to well data of an objective area to obtain an imaging section set; obtaining an optimized angle upper limit value according to acoustic logging data or zero VSP speed data of the objective area; and stacking and imaging sections which are smaller than the optimized angle upper limit value in the imaging section set. The method can eliminate wave shape distortion, frequency reduction, polarity inversion and statistical noise interference of a small-angle area for wide-angle reflection and can increase a reflected wave imaging resolution ratio to really reflect the vertical and horizontal variation of underground media.

The invention relates to a current transformer, which comprises a magnetic ring, a primary winding, a secondary winding and a shunt; wherein the shunt is connected with a circuit to be tested in series, the primary winding and the secondary winding are wound on the magnetic ring, the primary winding is connected with the shunt in parallel, and output signals of the secondary winding are used for measurement and analysis. The current transformer has a simple structure and cannot be easily interfered by an external magnetic field. True reflection of the attenuation state of the maximum aperiodic component, and elimination of secondary smearing after cutoff of faults can be realized according to optimal selection of parameters. The current transformer can be applied in waveform following and combining units after fault recording and reclosing multiple times, as well as traditional relay protection and primary current transformers.

The invention relates to the technical field of transformers, in particular to an intelligent power transformer having resonance elimination and monitoring functions. The intelligent power transformer includes a housing provided with an oil outlet and an installation plate, a coil arranged in the housing, an oil conservator arranged on the housing and used for supplying cooling oil to the coil, an iron core made of amorphous alloy materials, a resonance elimination coil arranged on the iron core and used for monitoring and regulating the magnetic flow change in the iron core, and a controlling device arranged on the intelligent power transformer or detachably arranged on a working platform and used for monitoring and remotely controlling the coil and the resonance elimination coil. The intelligent power transformer has the advantages that amorphous alloy cores are adopted, the electric energy transmission loss value is reduced, and energy conservation and environment protection are achieved; by the arrangement of the magnetic flow change monitoring and resonance elimination coil, waveform distortion is prevented, and power distribution is affected; by arranging a monitor and a sensor in the controlling device, remote operation of components in a circuit and monitoring of working states of all the components are achieved, and the power transformer is more intelligent, automated and integrated.