Universal serial bus (USB) for master-slave interconnection module of circuit system

A technology of serial bus and interconnection module, applied in the direction of bus network, data exchange through path configuration, etc., can solve the problems of poor scalability, poor flexibility, insufficient host hardware resources, etc., and achieve high-speed data transmission and simple bus protocol.

Inactive Publication Date: 2011-06-08
ZHONGBEI UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a serial bus for circuit system master-slave interconnection modules in order to solve the proble

Method used

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  • Universal serial bus (USB) for master-slave interconnection module of circuit system
  • Universal serial bus (USB) for master-slave interconnection module of circuit system
  • Universal serial bus (USB) for master-slave interconnection module of circuit system

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Embodiment

[0025] The slaves of the serial bus are provided with start codes and address codes, and each slave has a common start code and a unique address code.

[0026] There are 4 slaves connected to the serial bus, the common startup code is "0110", the address code of slave 1 is "00", the address code of slave 2 is "01", and the address code of slave 3 is "10", the address code of slave 4 is "11". When the master needs to communicate with the slave 2, the data transmission process on the bus is as follows:

[0027] First of all, under the control of the clock signal CSL, the master transmits the 4-digit start code "0110" and the address code "01" of the slave 2 through ASL, and all the slaves receive the start code and slave address transmitted over the ASL signal line, When the 4 slaves receive the start code "0110", they compare it with their own start code, and if they are consistent, they begin to prepare to receive the slave address "01" sent by the master.

[0028]Secondly, ...

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Abstract

The invention belongs to the technical field of a universal serial bus (USB), and aims to solve the problem that prior USB in a one-main multi-slave mode has the defects of poor expandability, poor flexibility, insufficient mainframe hardware resources and the like. The USB provided by the invention comprises a clock signal line (CSL), an address signal line (ASL), a main output slave input signal line (MOSI), and a main input slave output signal line (MISO). The starting and ending of data communications on a bus are controlled by a mainframe; before the data communication, the mainframe firstly transmits a slave address in a broadcasting manner; after receiving the slave address, a slave compares the address with the own address; if the two addresses are the same, gating is performed; a point-to-point communication is performed between the gated slave and the mainframe; and the non-gated slave does not receive the data transmitted by the mainframe. The USB is suitable for the one-main multi-slave mode of high-speed data transmission. The USB is not provided with a chip selection signal line, and the slave can be expanded optionally without considering the chip selection pin resources (hardware resources) of the mainframe, thereby being convenient for the functional expansion of the system.

Description

technical field [0001] The invention relates to a serial bus technology, in particular to a serial bus of a circuit system master-slave interconnection module. Background technique [0002] Compared with the parallel bus, the serial bus has the advantages of simple structure, less occupied pins and low cost. Common serial buses include USB, SPI, I 2 C etc., where SPI and I 2 C bus in single chip microcomputer, serial E 2 PROM, LCD and other devices have a wide range of applications. [0003] At present, the hardware system is developing in the direction of high speed, strong scalability, and small resource occupation. Usually, if a system needs to realize many functions, multiple slaves are required in the system, or the slave modules need to be expanded to add certain functions after the system is established. The existing host hardware resources and system structure will hinder the expansion of the system. In the existing serial bus, when the SPI bus works in the mode...

Claims

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Application Information

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IPC IPC(8): H04L12/40
Inventor 张丕状李沅韩焱李凯杨彦卿苏新彦
Owner ZHONGBEI UNIV
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