Serial interrupt processing method and device and computer system

A technology of a computer system and a processing device, applied in the computer field, can solve the problem of inability to serially interrupt signal processing and the like

Active Publication Date: 2011-07-20
EVOC INTELLIGENT TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0014] The object of the present invention is to provide a kind of serial interrupt processing method, device and computer system, aim at solving the computer system

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  • Serial interrupt processing method and device and computer system
  • Serial interrupt processing method and device and computer system
  • Serial interrupt processing method and device and computer system

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Embodiment Construction

[0032] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0033] In the embodiment of the present invention, the PCI-to-ISA bridge in the computer system outputs a serial interrupt (SERIRQ) signal to the serial interrupt processing device, and the serial interrupt processing device detects, collects, analyzes and processes the signal and converts it into The external interrupt signal allowed by the computer system is output to the central processing unit (CPU), and the central processing unit (CPU) calls the appropriate interrupt service program to process the external interrupt, so that the computer system without a dedicated serial interrupt processing m...

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Abstract

The invention is suitable for the computer field, in particular to a serial interrupt processing method and device and a computer system. Two input ends of the serial interrupt processing device are respectively connected with a reference clock generator and a PCI-to-ISA (Peripheral Command Indicator-to-Industry Standard Architecture) bridge; the output end of the serial interrupt processing device is connected with a CPU (Central Processing Unit) and comprises an interrupt mode processing module and/or an enquiry mode processing module, wherein the interrupt mode processing module is used for converting a serial interrupt signal output by the PCI-to-ISA bridge into a parallel interrupt signal in an interrupt mode; the enquiry mode processing module is used for converting a serial interrupt signal output by the PCI-to-ISA bridge into a parallel interrupt signal in an enquiry mode; and the interrupt which the parallel interrupt signal responds to is one of external interrupts permittedby a computer system. The computer system provided by the invention can process serial interrupts output by the PCI-to-ISA bridge without connection with a south bridge and has the advantages of low production cost, compact structure and easiness for miniaturization.

Description

technical field [0001] The invention belongs to the field of computers, and in particular relates to a serial interrupt processing method, device and computer system. Background technique [0002] Industry Standard Architecture (Industry Standard Architecture, ISA bus) is a bus standard developed by IBM for PC / AT computers. It is a 16-bit bus architecture, also known as the AT standard. In 1987, IEEE (Institute for Electrical and Electronic Engineers, Institute of Electrical and Electronics Engineers) formally formulated the ISA bus standard (IEEE-996). [0003] PC / 104 is an extension of the ISA (IEEE-996) standard and is an embedded bus specification. In 1992, PC / 104 was adopted as a basic document, called IEEE-P996.1 Compatible PC Embedded Module Standard. PC / 104 is an industrial control bus defined specifically for embedded control. IEEE-996 is the ISA industrial bus specification. The IEEE Association defines the PC / 104 industrial bus specification as IEEE-P996.1, so ...

Claims

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Application Information

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IPC IPC(8): G06F13/24
Inventor 陈志列马先明谢波张月
Owner EVOC INTELLIGENT TECH
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