Method for generating stepped frequency signals based on combination of direct digital synthesis (DDS) and ping-pong phase locked loop
A signal generation, phase-locked loop technology, applied in the field of radar, can solve the problems of frequency hopping time, minimum step phase noise, spurious level volume and cost constraints, achieve good performance, achieve large bandwidth, and achieve small steps the effect of
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[0028] figure 1 A hardware realization block diagram of the preferred embodiment of the present invention is given. Two phase-locked loops (PLL1 and PLL2) working in the L-band and single-pole double-throw switches form a ping-pong phase-locked loop. The frequency step of the phase-locked loop is set to 6MHz, which is controlled by FPGA to generate a step It is a 6MHz L-band broadband signal; DDS generates P-band small step signals under the control of FPGA. Since DDS is mainly used to realize the small steps between 6MHz large steps of the ping-pong phase-locked loop, the work of DDS The bandwidth is set to 6MHz, realizes the seamless combination with the ping-pong phase-locked loop, and under the situation of not making any changes to the hardware circuit, only through software programming, the DDS can realize multiple different frequency steps at the same time (this embodiment We have achieved 2MHz, 1.5MHz, 1MHz, 0.75MHz, 0.5MHz and other steps at the same time), in additi...
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