174results about How to "Low spurious" patented technology

An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

An automated biomonitoring system for monitoring water quality includes an exposure chamber for housing an aquatic organism having ventilatory behavior and body movement sensitive to water quality. Electrodes capture electrical signals produced by the organism during its ventilatory behavior and body movement, and a controller responsive to signals from the electrodes determines one or more ventilatory parameters based on the signals. The ventilatory parameters are compared with corresponding thresholds to determine when the water to which the organism is exposed has caused physiological stress to the organism. The signals captured by the electrodes may be corrected for variations in water conductivity so that the signals processed by the controlled are not influenced by conductivity.

An automated biomonitoring system for monitoring water quality includes an exposure chamber for housing an aquatic organism having ventilatory behavior and body movement sensitive to water quality. Electrodes sense electrical signals produced by the organism during its ventilatory behavior and body movement, and a controller responsive to signals from the electrodes determines a plurality of ventilatory parameters based on the signals. The ventilatory parameters are compared with corresponding thresholds to determine when the water to which the organism is exposed has caused physiological stress to the organism.

This invention relates to a design technology for chips of T-R devices of the wireless communication system characterizing in applying a double-mode step-forward method composed of an technology-voltage-temperature calibration mode and a locking mode to get the assigned output oscillation frequency step by step, in which, in the calibration mode, a MIM switch condenser array controlled by digital signals is applied for frequency rough calibration in a rather wide sphere and in the locking mode, a MOS condenser matrix combining with a modulation mode of high speed digit sigma delta controlled by digital signals is applied to get an accurate output oscillation frequency in a rather wide sphere, especially a coupling mode of an improved MOS variable-capacitance diode is applied to reduce the sensitivity of oscillators to noises, at the same time, a sigma delta modulator of a single-step three-stages feedforward structure is applied to reduce the stray in output signals and a fixed differential capacitor of certain capacitance values is parallel to both ends of the variable-capacitance control circuit to reduce the phase noise of the oscillator and improve the linearity of frequency adjustment.

The invention discloses a frequency synthesizer and a frequency synthesis method. The frequency synthesizer comprises: a large-stepping phase lock loop and a direct digital frequency synthesizer, an orthogonal mixer and a tracking phase lock loop. The orthogonal mixer is connected with the large-stepping phase lock loop and the digital frequency synthesizer respectively for mixing the frequency generated by the large-stepping phase lock loop and the low frequency generated by the direct digital frequency synthesizer to generate a single-sideband single tone; the tracking phase lock loop is connected with the orthogonal mixer for receiving the single-sideband single tone output by the orthogonal mixer and filtering the sideband leakage and oscillation leakage of the signal. The invention provides a frequency synthesizer with wide band width, small stepping, low stray and low noise and a frequency synthesis method. The invention has simple hardware structure and is easy to accomplish.

An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

The invention discloses a method for generating stepped frequency signals based on the combination of direct digital synthesis (DDS) and a ping-pong phase locked loop. DDS has the advantages of high narrowband application performance and capability of easily realizing extremely small frequency step, and the phase locked loop has the advantages of easily realizing broadband application and ensuring high comprehensive performance particularly in broadband great-step application. In the method, advantage complementarity between the DDS and the phase locked loop is utilized, a ping-pong phase locked loop is formed by combining two identical phase locked loops and a microwave single-pole double-throw switch, frequency synthesis is performed by combining the DDS and the ping-pong phase locked loop, the DDS is used for synthesizing narrowband small-step signals, the ping-pong phase locked loop is used for synthesizing broadband great-step signals, and the broadband great-step signal and the narrowband small-step signals are combined together in a frequency shifting way, thereby generating broadband radar stepped frequency signals with low phase noise, low stray, small step and frequency agility. Therefore, tactical and technical indexes of a radar frequency synthesizer are greatly increased, and qualitative leaps in technical indexes of the radar stepped frequency signals are achieved.

A digitally-tunable RF MEMS filter includes a substrate and a plurality of mechanically coupled resonators, wherein a first and a last resonator of the plurality of mechanically coupled resonators are configured to be electrostatically transduced. One or more of the plurality of mechanically coupled resonators are configured to be biased relative to the substrate such that the one or more biased resonators may be brought substantially in contact with the substrate. In a method of digitally tuning an RF MEMS filter having a mechanically coupled resonator array, a DC bias voltage is applied to at least a first resonator and a last resonator of the mechanically coupled resonator array such that motional boundary conditions for the at least first resonator and last resonator are selectable in proportion to the DC bias voltage.

A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. The RCU is clocked at a fast enough processor clock rate to insure that all PLL atomic operations are performed within a single PLL reference clock cycle.

A portable automated biomonitoring system for monitoring water quality includes an exposure chamber for housing an aquatic organism and a water inlet for directing water to the exposure chamber. The aquatic organism has ventilatory behavior and body movement sensitive to water quality. Electrodes sense electrical signals produced by the organism during its ventilatory behavior and body movement, and a controller responsive to signals from the electrodes determines a plurality of ventilatory parameters based on the signals. The ventilatory parameters are compared with corresponding thresholds to determine when the water to which the organism is exposed has caused physiological stress to the organism. The water being evaluated may be recirculated through the system for further analysis.

A Lamb-wave resonator includes: a piezoelectric substrate; an IDT electrode disposed on one principal surface of the piezoelectric substrate, having bus bar electrodes each connecting one ends of a plurality of electrode finger elements, the other ends of the plurality of electrode finger elements being interdigitated with each other to form an apposition area; and a pair of reflectors disposed on the one principal surface of the piezoelectric substrate, and respectively arranged on both sides of the IDT electrode in a propagation direction of a Lamb wave, wherein denoting a thickness of the piezoelectric substrate in the apposition area of the electrode finger elements as ti, a thickness of the piezoelectric substrate in areas between respective ends of the apposition area in a direction perpendicular to the propagation direction of the Lamb wave and the bus bar electrodes as tg, and a wavelength of the Lamb wave as λ, the thickness ti exists in a range represented by 0<ti / λ≦3, and a relationship of tg<ti is satisfied.

In a phase locked loop (PLL), phase shifters shift a phase of an input signal. Based on the phases of the input signal, the shifted signals, and a frequency division output signal, phase frequency detectors (PFDs) generate phase difference signals. In response to the phase difference signals, charge pumps (CPs) control output voltages thereof. Based on the output voltages of the CPs, a voltage controlled oscillator (VCO) outputs an output signal. A frequency divider divides the frequency of the output signal from the VCO to generate the frequency division output signal. A circulator outputs the frequency division output signal to one of the PFDs at a proper timing. A modulator reduces quantization errors of the frequency divider.

A portable automated biomonitoring system for monitoring water quality includes an exposure chamber for housing an aquatic organism and a water inlet for directing water to the exposure chamber. The aquatic organism has ventilatory behavior and body movement sensitive to water quality. Electrodes sense electrical signals produced by the organism during its ventilatory behavior and body movement, and a controller responsive to signals from the electrodes determines a plurality of ventilatory parameters based on the signals. The ventilatory parameters are compared with corresponding thresholds to determine when the water to which the organism is exposed has caused physiological stress to the organism. The water being evaluated may be recirculated through the system for further analysis.

The invention relates to a low-phase noise frequency source. The low-phase noise frequency source includes a low-phase noise reference source which sends low-phase noise 400MHz reference signals and low-phase noise 1000MHz reference signals to a DDS and control module and sends low-phase noise 400MHz excitation signals to a harmonic generation module, the DDS and control module which sends low-phase noise baseband signals to an output module and sends control signals to the output module and the harmonic generation module, the harmonic generation module which sends low-phase noise local vibration signals to the output module, and the output module which performs frequency mixing, filtering and frequency division on the baseband signals and the local vibration signals so as to obtain low-phase noise 5MHz-1000MHz signals which are adopted as output signals. The low-phase noise frequency source of the invention has the advantages of wide band, low stray degree, fine resolution and the like.

A self-calibrating Analog-to-Digital Converter (ADC) performs radix error calibration using a Successive-Approximation Register (SAR) to drive test voltages onto lower-significant capacitors. The final SAR code is corrected by performing LSB averaging on LSB averaging capacitors and then accumulated, and the measurement repeated many times to obtain a digital average measurement. An ideal radix or ratio of the measured capacitor's capacitance to a unit capacitance of an LSB capacitor is subtracted from the digital average measurement to obtain a measured error that is stored in a Look-Up Table (LUT) with the ideal radix. Radix error calibration is repeated for other capacitors to populate the LUT. During normal ADC conversion, the SAR code obtained from converting the analog input is applied to addresses the LUT, and all ideal radixes and measured errors for 1 bits in the SAR code are added together to generate an error-corrected digital value.

Improved spur reduction architectures that improve linearity in direct radio frequency (RF) receiver architectures. Non-uniform sampling in the form of sampling clock phase (or frequency) modulation is used to induce phase (or frequency) modulation on signals that are being received from a given Nyquist zone. At the output of the ADC (analog-to-digital converter), the signals are de-modulated to remove the induced modulation based on the Nyquist zone that is being received. The de-modulation process results in non-desired spurious artifacts (interfering leakage signals and ADC spurs) being spread in the frequency domain. Strong spurious artifacts may be removed after measuring the induced modulation and de-modulating. For the case of weak spurious artifacts, the de-modulation for the desired Nyquist zone spread these signals in the frequency domain. Induced modulation on signals may also provide a dithering effect on the ADC.

The invention relates to a method for synchronizing the time and the frequency of a motor-driven configured bistatic radar. The frequency and the time between a receiving station and a transmitting station of the bistatic radar can be realized by utilizing the characteristics of long-term stability, low phase noise and low stray; when the receiving station and the transmitting station are deployed separately, the real-time statistics of time synchronization errors of the receiving station and the transmitting station are completed on the basis of pulses per second of a navigation satellite; when the time synchronization errors exceed a limit value and the state of the pulses per second of the navigation satellite is normal, time resynchronization between the receiving station and the transmitting station is completed in a navigation satellite time service synchronization mode; the receiving station and the transmitting station enter a timekeeping synchronization state again. The method is applicable to synchronizing the time and the frequency of the motor-driven configured bistatic radar, and has the advantages of short erecting and withdrawing time, high maneuverability, high working stability and the like. Before the receiving station and the transmitting station are deployed separately, the modes of direct time contrast synchronization and long-time autonomous timekeeping maintenance are adopted, and have the advantages of being not limited by the navigation satellite and not impacted by electromagnetic environment in wartime.

The invention belongs to the technical field of radar wideband frequency synthesis and in particular relates to an ultra-wide band frequency-modulated signal generating method which is based on the combination of wideband DDS (direct digital synthesis) and an analog frequency synthesis technique. According to the invention, a wideband DDS chip is used for directly generating a wideband linear frequency-modulated, non-linear frequency-modulated or special phase-coded signal, and waveform signal parameters can be configured online by an upper computer. A radio frequency microwave band datum reference signal is generated by utilizing an analog phase-locked loop and a frequency synthesis technique, and the wideband linear frequency-modulated, non-linear frequency-modulated or special phase-coded signal and the radio frequency microwave band datum reference signal are combined by virtue of frequency spectrum shifting, thus an ultra-wide band frequency-modulated signal with low spur, low phase noise and high resolution is generated, a microwave direct frequency synthesizer with high resolution and low phase noise is realized and is simple in structure and easy to integrate.

The invention discloses an optoelectronic oscillation loop-based microwave two-third frequency division method, which comprises the following steps: performing primary carrier suppression optical double-sideband modulation on a photocarrier by use of a microwave signal to be subjected to frequency division, then performing secondary carrier suppression optical double-sideband modulation on a primarily modulated optical signal by use of an oscillation signal, converting a secondarily modulated optical signal into an electrical signal by use of a photodetector, causing the electrical signal to pass through a microwave amplifier, a phase shifter and a microwave filter, dividing the electrical signal into two paths as an oscillation signal and two-third frequency division output respectively,and forming positive feedback oscillation in a two-third frequency division oscillation mode in an optoelectronic oscillation loop, thereby obtaining stable two-third frequency division output. The invention also discloses an optoelectronic oscillation loop-based microwave two-third frequency division device. According to the method and the device, two-third frequency division of any microwave signal can be implemented in an optical domain, and the advantages of great bandwidth, low noise, low spur and little interference to the outside are achieved.

The invention relates to a frequency synthesis system for enhancing spectrum purity of a direct digital frequency synthesizer, which comprises a crystal oscillator, a phase-locked loop module (PLL), a direct digital frequency synthesis module (DDS), a filter module and a central processing unit, wherein the system uses the phase-locked loop module (PLL) to provide a variable clock for the direct digital frequency synthesis module (DDS), and the clock frequency of the variable clock provided by the phase-locked loop module (PLL) is an integral multiple of the frequency of the output signal. By changing the clock frequency of the direct digital frequency synthesizer, the noise generated in the quantization process is minimized, thereby improving the stray indexes of the output signal and enhancing the spectrum purity of the output signal.

The invention provides a radar seeker system. The system comprises a frequency synthesizer and a receiver, the frequency synthesizer provides a full-coherent emission excitation signal, an emission excitation coupling signal, a frequency conversion local oscillator signal and a frequency conversion local oscillator coupling signal for the whole machine. Waveform control and pulse modulation can becarried out on the transmitted signal according to an instruction sent by the whole machine; the frequency hopping of the frequency conversion local oscillator signal can be realized in a certain frequency range to achieve the final carrier frequency jump function; an X-band receiver is a down-conversion and intermediate-frequency amplification assembly comprising four channels and is used for down-converting four paths of X-band radio-frequency signals input by a microwave front end to intermediate frequency and carrying out intermediate-frequency amplification, and the amplification amountof an intermediate-frequency receiving system can be adjusted under the action of externally inputting an AGC control code. A high-isolation switch is provided so that a receiving link blocking function is realized.

The invention discloses a low-spurious / low-phase noise frequency synthesizer, and aims at providing the frequency synthesizer which is thin in stepping, low in spurious signal, low in phase noise, stable and reliable in work and fast in frequency switching speed. The low-spurious / low-phase noise frequency synthesizer is implemented by the technical scheme as follows: a reference signal generationunit uses an externally received reference input signal as unified reference frequency, the reference frequency uses an output signal of a DDS as a reference signal of a phase-locked loop (PLL) via adirect digital frequency synthesizer (DDS), and output frequency is controlled through changing a frequency control word of the DDS. The signal output by the DDS is fed into a phase-locked frequency mixing unit after being subjected to frequency multiplication for two times to be subjected to phase-locked frequency mixing with a local oscillator signal generated by a harmonic generation link at the phase-locked frequency mixing unit, the phase-locked frequency-mixing signal passes through an amplifying and filtering link and is filtered by a band-pass filter to acquire the needed local oscillator signal.

The invention discloses a quadruplicated frequency injection locking photoelectric oscillator. The quadruplicated frequency injection locking photoelectric oscillator comprises a dual-parallel mach-zehnder modulator (DPMZM), a light source, a photoelectric detector, a phase shifter, a microwave filter, a microwave amplifier and a power divider, wherein one radio frequency input port of the DPMZM is connected with a single-frequency injection signal, the light source is used for providing a light carrier for the DPMZM, an input end of the photoelectric detector is connected with an output end of the DPMZM by a fiber delay line, the phase shifter is used for adjusting a phase of an electrical signal, the microwave filter is used for filtering the electrical signal and is a narrow-band filterof which passband is around a quadruplicated frequency of the single-frequency injection signal, the microwave amplifier is used for amplifying the electrical signal, the power divider is used for dividing the electrical signal into two paths after the phase shifter, the microwave filter and the microwave amplifier, one path is input to the other radio frequency input port of the DPMZM, and the other path is used as an oscillation signal output of the quadruplicated frequency of the single-frequency injection signal. By the quadruplicated frequency injection locking photoelectric oscillator,stable output of the quadruplicated frequency of the injection signal can be achieved, and the quadruplicated frequency injection locking photoelectric oscillator is simple in structure and low in implementation cost.

The special feature lay on that: adopts the novel digital control mutual complementary type MOS capacity-variable diode to build digital control oscillator, therefore reduces the phase noise and stray of the oscillator and raises the frequency modulation precision of the oscillator. Comparing with the existed method, the method raises the function of the CMOS on-chip oscillator effectively, reduces the oscillator power and benefits to reduce the receiver cost and power consumption.

The invention relates to a miniaturized channel with low power consumption at the Ka frequency band. The miniaturized channel comprises a public passageway, a first passageway, a second passageway, a public local oscillator, a first passageway local oscillator and a second passageway local oscillator. Through design of frequency points of the public local oscillator, the first passageway local oscillator and the second passageway local oscillator and design of the framework of the public passageway, the first passageway and the second passageway, the number of the channels and the number of the local oscillators of a dual-passageway variable-frequency channel are reduced, the number of active devices is reduced, channel power consumption is greatly lowered, miniaturized design of the channel is achieved, and a high-dynamic, low-stray and dual-passageway miniaturized receiving channel with lower power consumption at the Ka frequency band is formed; in addition, automatic gain amplifiers in the two passageways are creatively designed, the base band is used for processing exiting resources, automatic and controllable gain amplification is achieved through the mode that analog and digital are combined, the number of detectors and the number of A / D samplers are reduced, resources are saved, cost is lowered, and precision is greatly improved.

A phase locked loop circuit comprises a charge pump fed with a phase error output signal; a loop filter charged or discharged with an output of the charge pump; an oscillator, an oscillating frequency of which is controlled by a voltage of the loop filter; and a frequency / phase comparator having a switching function which is fed with a reference signal and an output signal of the oscillator and outputs the phase error output signal; the frequency / phase comparator being configured to, based on a lock detection signal, switch between comparing frequencies by detecting rising edges of the reference signal and the comparison signal to detect a phase difference between the reference signal and the comparison signal, and comparing phases by detecting voltage levels of the reference signal and the comparison signal to detect a phase difference between the reference signal and the comparison signal.

A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. A multi-stage data stream based processor incorporates a parallel / pipelined architecture optimized to perform data stream processing efficiently. The multi-stage parallel / pipelined processor provides significantly higher processing speeds by combining multiple RCUs wherein input data samples are input in parallel to all RCUs while computation results from one RCU are used by adjacent downstream RCUs. A register file provides storage for historical values while local storage in each RCU provides storage for temporary results.

The invention discloses a 6-8.2 GHz five-band frequency synthesizer used for an OFDM UWB. The synthesizer comprises a first fixed-frequency phase-locked loop 1, a second fixed-frequency phase-locked loop, a multiple selector 3, a multiphase-dividing-two frequency divider 4 and a single sideband mixer 5. By adopting the direct frequency synthesis technique, the frequency synthesizer can output the local oscillator signals of the five bands frequency points of 6072 MHz, 6600 MHz, 7128 MHz, 7656 MHz and 8184 MHz; and the frequency hopping time between the frequency points at nanosecond level can be obtained, so that the demand of fast frequency hopping of the OFDM UWB communication system can be met. Moreover, IQ two-path local oscillator signals are output by the frequency synthesizer and can be applied to an UWB wireless transceiver with direct frequency conversion.

Phase locked loop charge pump comprising a drain node (A, B) and at least a cascode transistor (M4, M6) for limiting the variation of the voltage of said drain node, characterized in that an intermediate switch transistor (M3, M5) is placed between the drain node (A, B) and the cascode transistor (M4, M6).