Method of forming trenches with targeted critical dimensions

A critical dimension and groove technology, applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of no way to make up, poor uniformity of critical dimensions, low yield rate, etc., to improve the uniformity of critical dimensions performance, improve the effect of yield rate

Inactive Publication Date: 2011-12-14
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The disadvantage of this method is that even if it is found that there is a deviation in the final key dimension of the groove, there is no way

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  • Method of forming trenches with targeted critical dimensions
  • Method of forming trenches with targeted critical dimensions
  • Method of forming trenches with targeted critical dimensions

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[0030] In the following description, a lot of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described.

[0031] In order to thoroughly understand the present invention, detailed steps will be presented in the following description to illustrate the manufacturing process of the trench of the present invention. Obviously, the implementation of the present invention is not limited to the specific details familiar to those skilled in the semiconductor field. The preferred embodiments of the present invention are described in detail as follows. However, in addition to these detailed descriptions, the present invention may also have other embodiments.

[0032] The method of t...

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Abstract

The invention discloses a method for forming a trench with a target critical dimension, comprising: providing a front-end device structure, an intermetallic dielectric layer having a trench is formed on the front-end device structure, and the intermetallic dielectric layer The material is an oxide with a low dielectric constant; and a reaction gas containing a reducing gas is introduced to adjust the actual critical dimension of the trench to the target critical dimension. According to the method of the invention, the critical dimension uniformity of different wafers or different batches of grooves can be effectively improved, and the yield rate can be improved.

Description

technical field [0001] The invention relates to a manufacturing process of a semiconductor device, in particular to a method for manufacturing a groove. Background technique [0002] In the semiconductor manufacturing process, the required via holes or trenches are formed on the semiconductor substrate for applications such as damascene technology (damascene technology) in the back-end interconnection technology. Because copper has good electrical conductivity, it is used as a material for back-end interconnection lines in the semiconductor integrated circuit manufacturing process. Copper interconnects are generally formed by a damascene process or a dual damascene process. The single damascene structure only changes the manufacturing method of single-layer metal wires from the traditional (metal etching + dielectric layer filling) to the damascene method (dielectric layer etching + metal filling). The dual damascene structure combines via holes and metal wires, so that on...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L27/105
Inventor 周俊卿张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP
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